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Added ADC and I/O read.

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BIITER 2011-04-08 19:43:52 +02:00
parent b9d7328f20
commit 2b9ef9759b
8 changed files with 391 additions and 24 deletions
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2
firmware/src/ssp.c
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@ -67,7 +67,7 @@ LPC_GPIO2->DIR |= 1 << 0;
// SSP Enable with Master mode
LPC_SSP->CR1 = (0x01<<1) | (0x00<<2);
NVIC_EnableIRQ(SSP_IRQn);
// NVIC_EnableIRQ(SSP_IRQn);
/* Set SSPINMS registers to enable interrupts */
/* enable all error related interrupts */