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btr 2011-04-01 21:07:51 +02:00
parent 68d5066b23
commit 6454e35736
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firmware/CMSISv1p30_LPC13xx/.cproject Normal file
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&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
&lt;memory id="RAM" type="RAM"/&gt;&#13;
&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" id="MFlash8" location="0x00000000" size="0x2000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamLoc2" location="0x10000000" size="0x800"/&gt;&#13;
&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x400" progwithcode="TRUE" size="0x2000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER0" location="0x40004000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" id="UART0" location="0x40008000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_SSP" determined="infoFile" id="SSP" location="0x40040000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_I2C" determined="infoFile" id="I2C0" location="0x40000000"/&gt;&#13;
&lt;peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC13_SYSCTL" determined="infoFile" id="SYSCTL" location="0x40048000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO0" location="0x50000000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO1" location="0x50010000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO2" location="0x50020000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO3" location="0x50030000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR160" location="0x4000c000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR161" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC11_13_WDT" determined="infoFile" id="WDT" location="0x40004000"/&gt;&#13;
&lt;/chip&gt;&#13;
&lt;processor&gt;&#13;
&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
&lt;/processor&gt;&#13;
&lt;link href="nxp_lpc11_13_peripheral.xme" show="embed" type="simple"/&gt;&#13;
&lt;/info&gt;&#13;
&lt;/infoList&gt;&#13;
&lt;/TargetConfig&gt;</projectStorage>
</storageModule>
</cproject>

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include subdir.mk
-include src/subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
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# All Target
all: libCMSISv1p30_LPC13xx.a
# Tool invocations
libCMSISv1p30_LPC13xx.a: $(OBJS) $(USER_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: MCU Archiver'
arm-none-eabi-ar -r "libCMSISv1p30_LPC13xx.a" $(OBJS) $(USER_OBJS) $(LIBS)
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@echo ' '
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clean:
-$(RM) $(OBJS)$(C_DEPS)$(ARCHIVES) libCMSISv1p30_LPC13xx.a
-@echo ' '
post-build:
-@echo 'Performing post-build steps'
-arm-none-eabi-size libCMSISv1p30_LPC13xx.a ; # arm-none-eabi-objdump -h -S libCMSISv1p30_LPC13xx.a >libCMSISv1p30_LPC13xx.lss
-@echo ' '
.PHONY: all clean dependents
.SECONDARY: post-build
-include ../makefile.targets

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@ -0,0 +1,7 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
USER_OBJS :=
LIBS :=

18
firmware/CMSISv1p30_LPC13xx/Debug/sources.mk Normal file
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@ -0,0 +1,18 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
O_SRCS :=
C_SRCS :=
S_SRCS :=
S_UPPER_SRCS :=
OBJ_SRCS :=
ASM_SRCS :=
OBJS :=
C_DEPS :=
ARCHIVES :=
# Every subdirectory with source files must be described here
SUBDIRS := \
src \

27
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@ -0,0 +1,27 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../src/core_cm3.c \
../src/system_LPC13xx.c
OBJS += \
./src/core_cm3.o \
./src/system_LPC13xx.o
C_DEPS += \
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src/%.o: ../src/%.c
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
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@echo 'Finished building: $<'
@echo ' '

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CMSIS : Cortex Microcontroller Software Interface Standard
==========================================================
CMSIS defines for a Cortex-M Microcontroller System:
* A common way to access peripheral registers and a
common way to define exception vectors.
* The register names of the Core Peripherals and the
names of the Core Exception Vectors.
* An device independent interface for RTOS Kernels
including a debug channel.
By using CMSIS compliant software components, the user can
easier re-use template code. CMSIS is intended to enable the
combination of software components from multiple middleware
vendors.
This project contains appropriate files for this MCU family
taken from CMSIS. A full copy of the CMSIS files can be found
within your tools installation directory. More information on
CMSIS can be found at:
http://www.onarm.com/
http://www.arm.com/

320
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<body>
<h1>Changes to CMSIS version V1.20</h1>
<hr>
<h2>1. Removed CMSIS Middelware packages</h2>
<p>
CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
</p>
<h2>2. SystemFrequency renamed to SystemCoreClock</h2>
<p>
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
because the variable holds the clock value at which the core is running.
</p>
<h2>3. Changed startup concept</h2>
<p>
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
from main) has the weakness that it does not work for controllers which need a already
configuerd clock system to configure the external memory controller.
</p>
<h3>Changed startup concept</h3>
<ul>
<li>
SystemInit() is called from startup file before <strong>premain</strong>.
</li>
<li>
<strong>SystemInit()</strong> configures the clock system and also configures
an existing external memory controller.
</li>
<li>
<strong>SystemInit()</strong> must not use global variables.
</li>
<li>
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
</li>
<li>
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
and must be called whenever the core clock is changed.<br>
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
the current core clock.
</li>
</ul>
<h2>4. Advanced Debug Functions</h2>
<p>
ITM communication channel is only capable for OUT direction. To allow also communication for
IN direction a simple concept is provided.
</p>
<ul>
<li>
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
</li>
<li>
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
</li>
<li>
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
</li>
</ul>
<p>
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
</p>
<h2>5. Core Register Bit Definitions</h2>
<p>
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
defines correspond with the Cortex-M Technical Reference Manual.
</p>
<p>
e.g. SysTick structure with bit definitions
</p>
<pre>
/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
memory mapped structure for SysTick
@{
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
<h2>7. DoxyGen Tags</h2>
<p>
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
using DoxyGen.
</p>
<h2>8. Folder Structure</h2>
<p>
The folder structure is changed to differentiate the single support packages.
</p>
<ul>
<li>CM0</li>
<li>CM3
<ul>
<li>CoreSupport</li>
<li>DeviceSupport</li>
<ul>
<li>Vendor
<ul>
<li>Device
<ul>
<li>Startup
<ul>
<li>Toolchain</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Vendor</li>
<li>...</li>
</ul>
</li>
<li>Example
<ul>
<li>Toolchain
<ul>
<li>Device</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Documentation</li>
</ul>
<h2>9. Open Points</h2>
<p>
Following points need to be clarified and solved:
</p>
<ul>
<li>
<p>
Equivalent C and Assembler startup files.
</p>
<p>
Is there a need for having C startup files although assembler startup files are
very efficient and do not need to be changed?
<p/>
</li>
<li>
<p>
Placing of HEAP in external RAM.
</p>
<p>
It must be possible to place HEAP in external RAM if the device supports an
external memory controller.
</p>
</li>
<li>
<p>
Placing of STACK /HEAP.
</p>
<p>
STACK should always be placed at the end of internal RAM.
</p>
<p>
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
</p>
</li>
<li>
<p>
Removing core_cm3.c and core_cm0.c.
</p>
<p>
On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
appropriate compiler intrinsics.
</p>
</li>
</ul>
<h2>10. Limitations</h2>
<p>
The following limitations are not covered with the current CMSIS version:
</p>
<ul>
<li>
No <strong>C startup files</strong> for ARM toolchain are provided.
</li>
<li>
No <strong>C startup files</strong> for GNU toolchain are provided.
</li>
<li>
No <strong>C startup files</strong> for IAR toolchain are provided.
</li>
<li>
No <strong>Tasking</strong> projects are provided yet.
</li>
</ul>

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padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
padding-bottom: 2pt }
/*-----------------------------------------------------------
-----------------------------------------------------------*/
-->
</style>
</head>
<body>
<h1>CMSIS Debug Support</h1>
<hr>
<h2>Cortex-M3 ITM Debug Access</h2>
<p>
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
communication channels are used by CMSIS to output the following information:
</p>
<ul>
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
</ul>
<h2>Debug IN / OUT functions</h2>
<p>CMSIS provides following debug functions:</p>
<ul>
<li>ITM_SendChar (uses ITM channel 0)</li>
<li>ITM_ReceiveChar (uses global variable)</li>
<li>ITM_CheckChar (uses global variable)</li>
</ul>
<h3>ITM_SendChar</h3>
<p>
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
the microcontroller system to the debug system. <br>
Only a 8 bit value is transmitted.
</p>
<pre>
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
{
/* check if debugger connected and ITM channel enabled for tracing */
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &amp;&amp;
(ITM-&gt;TCR & ITM_TCR_ITMENA) &amp;&amp;
(ITM-&gt;TER & (1UL &lt;&lt; 0)) )
{
while (ITM-&gt;PORT[0].u32 == 0);
ITM-&gt;PORT[0].u8 = (uint8_t)ch;
}
return (ch);
}</pre>
<h3>ITM_ReceiveChar</h3>
<p>
ITM communication channel is only capable for OUT direction. For IN direction
a globel variable is used. A simple mechansim detects if a character is received.
The project to test need to be build with debug information.
</p>
<p>
The globale variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to enshure a proper handshake.
</p>
<pre>
extern volatile int ITM_RxBuffer; /* variable to receive characters */
</pre>
<p>
A dedicated bit pattern is used to determin if <strong>ITM_RxBuffer</strong> is empty
or contains a valid value.
</p>
<pre>
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
</pre>
<p>
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
It returns the received character or '-1' if no character was available.
</p>
<pre>
static __INLINE int ITM_ReceiveChar (void) {
int ch = -1; /* no character available */
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
ch = ITM_RxBuffer;
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
}
return (ch);
}
</pre>
<h3>ITM_CheckChar</h3>
<p>
<strong>ITM_CheckChar</strong> is used to check if a character is received.
</p>
<pre>
static __INLINE int ITM_CheckChar (void) {
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
return (0); /* no character available */
} else {
return (1); /* character available */
}
}</pre>
<h2>ITM Debug Support in uVision</h2>
<p>
uVision uses in a debug session the <strong>Debug (printf) Viewer</strong> window to
display the debug data.
</p>
<p>Direction microcontroller system -&gt; uVision:</p>
<ul>
<li>
Characters received via ITM communication channel 0 are written in a printf style
to <strong>Debug (printf) Viewer</strong> window.
</li>
</ul>
<p>Direction uVision -&gt; microcontroller system:</p>
<ul>
<li>Check if <strong>ITM_RxBuffer</strong> variable is available (only performed once).</li>
<li>Read character from <strong>Debug (printf) Viewer</strong> window.</li>
<li>If <strong>ITM_RxBuffer</strong> empty write character to <strong>ITM_RxBuffer</strong>.</li>
</ul>
<p class="Note">Note</p>
<ul>
<li><p>Current solution does not use a buffer machanism for trasmitting the characters.</p>
</li>
</ul>
<h2>RTX Kernel awareness in uVision</h2>
<p>
uVision / RTX are using a simple and efficient solution for RTX Kernel awareness.
No format overhead is necessary.<br>
uVsion debugger decodes the RTX events via the 32 / 16 / 8 bit ITM write access
to ITM communication channel 31.
</p>
<p>Following RTX events are traced:</p>
<ul>
<li>Task Create / Delete event
<ol>
<li>32 bit access. Task start address is transmitted</li>
<li>16 bit access. Task ID and Create/Delete flag are transmitted<br>
High byte holds Create/Delete flag, Low byte holds TASK ID.
</li>
</ol>
</li>
<li>Task switch event
<ol>
<li>8 bit access. Task ID of current task is transmitted</li>
</ol>
</li>
</ul>
<p class="Note">Note</p>
<ul>
<li><p>Other RTOS information could be retrieved via memory read access in a polling mode manner.</p>
</li>
</ul>
<p class="MsoNormal"><span lang="EN-GB">&nbsp;</span></p>
<hr>
<p class="TinyT">Copyright © KEIL - An ARM Company.<br>
All rights reserved.<br>
Visit our web site at <a href="http://www.keil.com">www.keil.com</a>.
</p>
</body>
</html>

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History of updates to CMSISv1p30_LPC13xx
========================================
18 February 2010
----------------
system_LPC13xx.c updated to new version (dated 18 February 2010),
changing value of SYSPLLCTRL_Val from 0x05 to 0x25
23 March 2010
-------------
Optimisation level of release build of project changed from
-O2 to -Os.

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/**************************************************************************//**
* @file LPC13xx.h
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File for
* NXP LPC13xx Device Series
* @version V1.01
* @date 19. October 2009
*
* @note
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef __LPC13xx_H__
#define __LPC13xx_H__
/*
* ==========================================================================
* ---------- Interrupt Number Definition -----------------------------------
* ==========================================================================
*/
typedef enum IRQn
{
/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
/****** LPC13xx Specific Interrupt Numbers *******************************************************/
WAKEUP0_IRQn = 0, /*!< All I/O pins can be used as wakeup source. */
WAKEUP1_IRQn = 1, /*!< There are 40 pins in total for LPC17xx */
WAKEUP2_IRQn = 2,
WAKEUP3_IRQn = 3,
WAKEUP4_IRQn = 4,
WAKEUP5_IRQn = 5,
WAKEUP6_IRQn = 6,
WAKEUP7_IRQn = 7,
WAKEUP8_IRQn = 8,
WAKEUP9_IRQn = 9,
WAKEUP10_IRQn = 10,
WAKEUP11_IRQn = 11,
WAKEUP12_IRQn = 12,
WAKEUP13_IRQn = 13,
WAKEUP14_IRQn = 14,
WAKEUP15_IRQn = 15,
WAKEUP16_IRQn = 16,
WAKEUP17_IRQn = 17,
WAKEUP18_IRQn = 18,
WAKEUP19_IRQn = 19,
WAKEUP20_IRQn = 20,
WAKEUP21_IRQn = 21,
WAKEUP22_IRQn = 22,
WAKEUP23_IRQn = 23,
WAKEUP24_IRQn = 24,
WAKEUP25_IRQn = 25,
WAKEUP26_IRQn = 26,
WAKEUP27_IRQn = 27,
WAKEUP28_IRQn = 28,
WAKEUP29_IRQn = 29,
WAKEUP30_IRQn = 30,
WAKEUP31_IRQn = 31,
WAKEUP32_IRQn = 32,
WAKEUP33_IRQn = 33,
WAKEUP34_IRQn = 34,
WAKEUP35_IRQn = 35,
WAKEUP36_IRQn = 36,
WAKEUP37_IRQn = 37,
WAKEUP38_IRQn = 38,
WAKEUP39_IRQn = 39,
I2C_IRQn = 40, /*!< I2C Interrupt */
TIMER_16_0_IRQn = 41, /*!< 16-bit Timer0 Interrupt */
TIMER_16_1_IRQn = 42, /*!< 16-bit Timer1 Interrupt */
TIMER_32_0_IRQn = 43, /*!< 32-bit Timer0 Interrupt */
TIMER_32_1_IRQn = 44, /*!< 32-bit Timer1 Interrupt */
SSP_IRQn = 45, /*!< SSP Interrupt */
UART_IRQn = 46, /*!< UART Interrupt */
USB_IRQn = 47, /*!< USB Regular Interrupt */
USB_FIQn = 48, /*!< USB Fast Interrupt */
ADC_IRQn = 49, /*!< A/D Converter Interrupt */
WDT_IRQn = 50, /*!< Watchdog timer Interrupt */
BOD_IRQn = 51, /*!< Brown Out Detect(BOD) Interrupt */
EINT3_IRQn = 53, /*!< External Interrupt 3 Interrupt */
EINT2_IRQn = 54, /*!< External Interrupt 2 Interrupt */
EINT1_IRQn = 55, /*!< External Interrupt 1 Interrupt */
EINT0_IRQn = 56, /*!< External Interrupt 0 Interrupt */
} IRQn_Type;
/*
* ==========================================================================
* ----------- Processor and Core Peripheral Section ------------------------
* ==========================================================================
*/
/* Configuration of the Cortex-M3 Processor and Core Peripherals */
#define __MPU_PRESENT 1 /*!< MPU present or not */
#define __NVIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
#include "core_cm3.h" /* Cortex-M3 processor and core peripherals */
#include "system_LPC13xx.h" /* System Header */
/******************************************************************************/
/* Device Specific Peripheral registers structures */
/******************************************************************************/
#if defined ( __CC_ARM )
#pragma anon_unions
#endif
/*------------- System Control (SYSCON) --------------------------------------*/
typedef struct
{
__IO uint32_t SYSMEMREMAP; /* Sys mem. Remap, Offset 0x0 */
__IO uint32_t PRESETCTRL;
__IO uint32_t SYSPLLCTRL; /* Sys PLL control */
__IO uint32_t SYSPLLSTAT;
__IO uint32_t USBPLLCTRL; /* USB PLL control, offset 0x10 */
__IO uint32_t USBPLLSTAT;
uint32_t RESERVED0[2];
__IO uint32_t SYSOSCCTRL; /* Offset 0x20 */
__IO uint32_t WDTOSCCTRL;
__IO uint32_t IRCCTRL;
uint32_t RESERVED1[1];
__IO uint32_t SYSRESSTAT; /* Offset 0x30 */
uint32_t RESERVED2[3];
__IO uint32_t SYSPLLCLKSEL; /* Offset 0x40 */
__IO uint32_t SYSPLLCLKUEN;
__IO uint32_t USBPLLCLKSEL;
__IO uint32_t USBPLLCLKUEN;
uint32_t RESERVED3[8];
__IO uint32_t MAINCLKSEL; /* Offset 0x70 */
__IO uint32_t MAINCLKUEN;
__IO uint32_t SYSAHBCLKDIV;
uint32_t RESERVED4[1];
__IO uint32_t SYSAHBCLKCTRL; /* Offset 0x80 */
uint32_t RESERVED5[4];
__IO uint32_t SSPCLKDIV;
__IO uint32_t UARTCLKDIV;
uint32_t RESERVED6[4];
__IO uint32_t TRACECLKDIV;
__IO uint32_t SYSTICKCLKDIV; /* Offset 0xB0 */
uint32_t RESERVED7[3];
__IO uint32_t USBCLKSEL; /* Offset 0xC0 */
__IO uint32_t USBCLKUEN;
__IO uint32_t USBCLKDIV;
uint32_t RESERVED8[1];
__IO uint32_t WDTCLKSEL; /* Offset 0xD0 */
__IO uint32_t WDTCLKUEN;
__IO uint32_t WDTCLKDIV;
uint32_t RESERVED9[1];
__IO uint32_t CLKOUTCLKSEL; /* Offset 0xE0 */
__IO uint32_t CLKOUTUEN;
__IO uint32_t CLKOUTDIV;
uint32_t RESERVED10[5];
__IO uint32_t PIOPORCAP0; /* Offset 0x100 */
__IO uint32_t PIOPORCAP1;
uint32_t RESERVED11[18];
__IO uint32_t BODCTRL; /* Offset 0x150 */
uint32_t RESERVED12[1];
__IO uint32_t SYSTCKCAL;
uint32_t RESERVED13[41];
__IO uint32_t STARTAPRP0; /* Offset 0x200 */
__IO uint32_t STARTERP0;
__IO uint32_t STARTRSRP0CLR;
__IO uint32_t STARTSRP0;
__IO uint32_t STARTAPRP1;
__IO uint32_t STARTERP1;
__IO uint32_t STARTRSRP1CLR;
__IO uint32_t STARTSRP1;
uint32_t RESERVED14[4];
__IO uint32_t PDSLEEPCFG; /* Offset 0x230 */
__IO uint32_t PDAWAKECFG;
__IO uint32_t PDRUNCFG;
uint32_t RESERVED15[110];
__I uint32_t DEVICE_ID;
} LPC_SYSCON_TypeDef;
/*------------- Pin Connect Block (IOCON) --------------------------------*/
typedef struct
{
__IO uint32_t PIO2_6;
uint32_t RESERVED0[1];
__IO uint32_t PIO2_0;
__IO uint32_t RESET_PIO0_0;
__IO uint32_t PIO0_1;
__IO uint32_t PIO1_8;
uint32_t RESERVED1[1];
__IO uint32_t PIO0_2;
__IO uint32_t PIO2_7;
__IO uint32_t PIO2_8;
__IO uint32_t PIO2_1;
__IO uint32_t PIO0_3;
__IO uint32_t PIO0_4;
__IO uint32_t PIO0_5;
__IO uint32_t PIO1_9;
__IO uint32_t PIO3_4;
__IO uint32_t PIO2_4;
__IO uint32_t PIO2_5;
__IO uint32_t PIO3_5;
__IO uint32_t PIO0_6;
__IO uint32_t PIO0_7;
__IO uint32_t PIO2_9;
__IO uint32_t PIO2_10;
__IO uint32_t PIO2_2;
__IO uint32_t PIO0_8;
__IO uint32_t PIO0_9;
__IO uint32_t JTAG_TCK_PIO0_10;
__IO uint32_t PIO1_10;
__IO uint32_t PIO2_11;
__IO uint32_t JTAG_TDI_PIO0_11;
__IO uint32_t JTAG_TMS_PIO1_0;
__IO uint32_t JTAG_TDO_PIO1_1;
__IO uint32_t JTAG_nTRST_PIO1_2;
__IO uint32_t PIO3_0;
__IO uint32_t PIO3_1;
__IO uint32_t PIO2_3;
__IO uint32_t ARM_SWDIO_PIO1_3;
__IO uint32_t PIO1_4;
__IO uint32_t PIO1_11;
__IO uint32_t PIO3_2;
__IO uint32_t PIO1_5;
__IO uint32_t PIO1_6;
__IO uint32_t PIO1_7;
__IO uint32_t PIO3_3;
__IO uint32_t SCKLOC; /* For HB1 only, new feature */
} LPC_IOCON_TypeDef;
/*------------- Power Management Unit (PMU) --------------------------*/
typedef struct
{
__IO uint32_t PCON;
__IO uint32_t GPREG0;
__IO uint32_t GPREG1;
__IO uint32_t GPREG2;
__IO uint32_t GPREG3;
__IO uint32_t GPREG4;
} LPC_PMU_TypeDef;
/*------------- General Purpose Input/Output (GPIO) --------------------------*/
typedef struct
{
union {
__IO uint32_t MASKED_ACCESS[4096];
struct {
uint32_t RESERVED0[4095];
__IO uint32_t DATA;
};
};
uint32_t RESERVED1[4096];
__IO uint32_t DIR;
__IO uint32_t IS;
__IO uint32_t IBE;
__IO uint32_t IEV;
__IO uint32_t IE;
__IO uint32_t RIS;
__IO uint32_t MIS;
__IO uint32_t IC;
} LPC_GPIO_TypeDef;
/*------------- Timer (TMR) --------------------------------------------------*/
typedef struct
{
__IO uint32_t IR;
__IO uint32_t TCR;
__IO uint32_t TC;
__IO uint32_t PR;
__IO uint32_t PC;
__IO uint32_t MCR;
__IO uint32_t MR0;
__IO uint32_t MR1;
__IO uint32_t MR2;
__IO uint32_t MR3;
__IO uint32_t CCR;
__I uint32_t CR0;
uint32_t RESERVED1[3];
__IO uint32_t EMR;
uint32_t RESERVED2[12];
__IO uint32_t CTCR;
__IO uint32_t PWMC;
} LPC_TMR_TypeDef;
/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
typedef struct
{
union {
__I uint32_t RBR;
__O uint32_t THR;
__IO uint32_t DLL;
};
union {
__IO uint32_t DLM;
__IO uint32_t IER;
};
union {
__I uint32_t IIR;
__O uint32_t FCR;
};
__IO uint32_t LCR;
__IO uint32_t MCR;
__I uint32_t LSR;
__I uint32_t MSR;
__IO uint32_t SCR;
__IO uint32_t ACR;
__IO uint32_t ICR;
__IO uint32_t FDR;
uint32_t RESERVED0;
__IO uint32_t TER;
uint32_t RESERVED1[6];
__IO uint32_t RS485CTRL;
__IO uint32_t ADRMATCH;
__IO uint32_t RS485DLY;
__I uint32_t FIFOLVL;
} LPC_UART_TypeDef;
/*------------- Synchronous Serial Communication (SSP) -----------------------*/
typedef struct
{
__IO uint32_t CR0;
__IO uint32_t CR1;
__IO uint32_t DR;
__I uint32_t SR;
__IO uint32_t CPSR;
__IO uint32_t IMSC;
__IO uint32_t RIS;
__IO uint32_t MIS;
__IO uint32_t ICR;
} LPC_SSP_TypeDef;
/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
typedef struct
{
__IO uint32_t CONSET;
__I uint32_t STAT;
__IO uint32_t DAT;
__IO uint32_t ADR0;
__IO uint32_t SCLH;
__IO uint32_t SCLL;
__O uint32_t CONCLR;
__IO uint32_t MMCTRL;
__IO uint32_t ADR1;
__IO uint32_t ADR2;
__IO uint32_t ADR3;
__I uint32_t DATA_BUFFER;
__IO uint32_t MASK0;
__IO uint32_t MASK1;
__IO uint32_t MASK2;
__IO uint32_t MASK3;
} LPC_I2C_TypeDef;
/*------------- Watchdog Timer (WDT) -----------------------------------------*/
typedef struct
{
__IO uint32_t MOD;
__IO uint32_t TC;
__O uint32_t FEED;
__I uint32_t TV;
} LPC_WDT_TypeDef;
/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/
typedef struct
{
__IO uint32_t CR;
__IO uint32_t GDR;
uint32_t RESERVED0;
__IO uint32_t INTEN;
__I uint32_t DR0;
__I uint32_t DR1;
__I uint32_t DR2;
__I uint32_t DR3;
__I uint32_t DR4;
__I uint32_t DR5;
__I uint32_t DR6;
__I uint32_t DR7;
__I uint32_t STAT;
} LPC_ADC_TypeDef;
/*------------- Universal Serial Bus (USB) -----------------------------------*/
typedef struct
{
__I uint32_t DevIntSt; /* USB Device Interrupt Registers */
__IO uint32_t DevIntEn;
__O uint32_t DevIntClr;
__O uint32_t DevIntSet;
__O uint32_t CmdCode; /* USB Device SIE Command Registers */
__I uint32_t CmdData;
__I uint32_t RxData; /* USB Device Transfer Registers */
__O uint32_t TxData;
__I uint32_t RxPLen;
__O uint32_t TxPLen;
__IO uint32_t Ctrl;
__O uint32_t DevFIQSel;
} LPC_USB_TypeDef;
#if defined ( __CC_ARM )
#pragma no_anon_unions
#endif
/******************************************************************************/
/* Peripheral memory map */
/******************************************************************************/
/* Base addresses */
#define LPC_FLASH_BASE (0x00000000UL)
#define LPC_RAM_BASE (0x10000000UL)
#define LPC_APB0_BASE (0x40000000UL)
#define LPC_AHB_BASE (0x50000000UL)
/* APB0 peripherals */
#define LPC_I2C_BASE (LPC_APB0_BASE + 0x00000)
#define LPC_WDT_BASE (LPC_APB0_BASE + 0x04000)
#define LPC_UART_BASE (LPC_APB0_BASE + 0x08000)
#define LPC_CT16B0_BASE (LPC_APB0_BASE + 0x0C000)
#define LPC_CT16B1_BASE (LPC_APB0_BASE + 0x10000)
#define LPC_CT32B0_BASE (LPC_APB0_BASE + 0x14000)
#define LPC_CT32B1_BASE (LPC_APB0_BASE + 0x18000)
#define LPC_ADC_BASE (LPC_APB0_BASE + 0x1C000)
#define LPC_USB_BASE (LPC_APB0_BASE + 0x20000)
#define LPC_PMU_BASE (LPC_APB0_BASE + 0x38000)
#define LPC_SSP_BASE (LPC_APB0_BASE + 0x40000)
#define LPC_IOCON_BASE (LPC_APB0_BASE + 0x44000)
#define LPC_SYSCON_BASE (LPC_APB0_BASE + 0x48000)
/* AHB peripherals */
#define LPC_GPIO_BASE (LPC_AHB_BASE + 0x00000)
#define LPC_GPIO0_BASE (LPC_AHB_BASE + 0x00000)
#define LPC_GPIO1_BASE (LPC_AHB_BASE + 0x10000)
#define LPC_GPIO2_BASE (LPC_AHB_BASE + 0x20000)
#define LPC_GPIO3_BASE (LPC_AHB_BASE + 0x30000)
/******************************************************************************/
/* Peripheral declaration */
/******************************************************************************/
#define LPC_I2C ((LPC_I2C_TypeDef *) LPC_I2C_BASE )
#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )
#define LPC_UART ((LPC_UART_TypeDef *) LPC_UART_BASE )
#define LPC_TMR16B0 ((LPC_TMR_TypeDef *) LPC_CT16B0_BASE)
#define LPC_TMR16B1 ((LPC_TMR_TypeDef *) LPC_CT16B1_BASE)
#define LPC_TMR32B0 ((LPC_TMR_TypeDef *) LPC_CT32B0_BASE)
#define LPC_TMR32B1 ((LPC_TMR_TypeDef *) LPC_CT32B1_BASE)
#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )
#define LPC_PMU ((LPC_PMU_TypeDef *) LPC_PMU_BASE )
#define LPC_SSP ((LPC_SSP_TypeDef *) LPC_SSP_BASE )
#define LPC_IOCON ((LPC_IOCON_TypeDef *) LPC_IOCON_BASE )
#define LPC_SYSCON ((LPC_SYSCON_TypeDef *) LPC_SYSCON_BASE)
#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )
#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )
#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
#endif // __LPC13xx_H__

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/**************************************************************************//**
* @file system_LPC13xx.h
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File
* for the NXP LPC13xx Device Series
* @version V1.01
* @date 19. October 2009
*
* @note
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#ifndef __SYSTEM_LPC13xx_H
#define __SYSTEM_LPC13xx_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_LPC13x_H */

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/**************************************************************************//**
* @file core_cm3.c
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
* @version V1.30
* @date 30. October 2009
*
* @note
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#include <stdint.h>
/* define compiler specific symbols */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
/* ################### Compiler specific Intrinsics ########################### */
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */
/**
* @brief Return the Process Stack Pointer
*
* @return ProcessStackPointer
*
* Return the actual process stack pointer
*/
__ASM uint32_t __get_PSP(void)
{
mrs r0, psp
bx lr
}
/**
* @brief Set the Process Stack Pointer
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
__ASM void __set_PSP(uint32_t topOfProcStack)
{
msr psp, r0
bx lr
}
/**
* @brief Return the Main Stack Pointer
*
* @return Main Stack Pointer
*
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
__ASM uint32_t __get_MSP(void)
{
mrs r0, msp
bx lr
}
/**
* @brief Set the Main Stack Pointer
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
__ASM void __set_MSP(uint32_t mainStackPointer)
{
msr msp, r0
bx lr
}
/**
* @brief Reverse byte order in unsigned short value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in unsigned short value
*/
__ASM uint32_t __REV16(uint16_t value)
{
rev16 r0, r0
bx lr
}
/**
* @brief Reverse byte order in signed short value with sign extension to integer
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in signed short value with sign extension to integer
*/
__ASM int32_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
}
#if (__ARMCC_VERSION < 400000)
/**
* @brief Remove the exclusive lock created by ldrex
*
* Removes the exclusive lock which is created by ldrex.
*/
__ASM void __CLREX(void)
{
clrex
}
/**
* @brief Return the Base Priority value
*
* @return BasePriority
*
* Return the content of the base priority register
*/
__ASM uint32_t __get_BASEPRI(void)
{
mrs r0, basepri
bx lr
}
/**
* @brief Set the Base Priority value
*
* @param basePri BasePriority
*
* Set the base priority register
*/
__ASM void __set_BASEPRI(uint32_t basePri)
{
msr basepri, r0
bx lr
}
/**
* @brief Return the Priority Mask value
*
* @return PriMask
*
* Return state of the priority mask bit from the priority mask register
*/
__ASM uint32_t __get_PRIMASK(void)
{
mrs r0, primask
bx lr
}
/**
* @brief Set the Priority Mask value
*
* @param priMask PriMask
*
* Set the priority mask bit in the priority mask register
*/
__ASM void __set_PRIMASK(uint32_t priMask)
{
msr primask, r0
bx lr
}
/**
* @brief Return the Fault Mask value
*
* @return FaultMask
*
* Return the content of the fault mask register
*/
__ASM uint32_t __get_FAULTMASK(void)
{
mrs r0, faultmask
bx lr
}
/**
* @brief Set the Fault Mask value
*
* @param faultMask faultMask value
*
* Set the fault mask register
*/
__ASM void __set_FAULTMASK(uint32_t faultMask)
{
msr faultmask, r0
bx lr
}
/**
* @brief Return the Control Register value
*
* @return Control value
*
* Return the content of the control register
*/
__ASM uint32_t __get_CONTROL(void)
{
mrs r0, control
bx lr
}
/**
* @brief Set the Control Register value
*
* @param control Control value
*
* Set the control register
*/
__ASM void __set_CONTROL(uint32_t control)
{
msr control, r0
bx lr
}
#endif /* __ARMCC_VERSION */
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#pragma diag_suppress=Pe940
/**
* @brief Return the Process Stack Pointer
*
* @return ProcessStackPointer
*
* Return the actual process stack pointer
*/
uint32_t __get_PSP(void)
{
__ASM("mrs r0, psp");
__ASM("bx lr");
}
/**
* @brief Set the Process Stack Pointer
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
void __set_PSP(uint32_t topOfProcStack)
{
__ASM("msr psp, r0");
__ASM("bx lr");
}
/**
* @brief Return the Main Stack Pointer
*
* @return Main Stack Pointer
*
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
uint32_t __get_MSP(void)
{
__ASM("mrs r0, msp");
__ASM("bx lr");
}
/**
* @brief Set the Main Stack Pointer
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
void __set_MSP(uint32_t topOfMainStack)
{
__ASM("msr msp, r0");
__ASM("bx lr");
}
/**
* @brief Reverse byte order in unsigned short value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in unsigned short value
*/
uint32_t __REV16(uint16_t value)
{
__ASM("rev16 r0, r0");
__ASM("bx lr");
}
/**
* @brief Reverse bit order of value
*
* @param value value to reverse
* @return reversed value
*
* Reverse bit order of value
*/
uint32_t __RBIT(uint32_t value)
{
__ASM("rbit r0, r0");
__ASM("bx lr");
}
/**
* @brief LDR Exclusive (8 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 8 bit values)
*/
uint8_t __LDREXB(uint8_t *addr)
{
__ASM("ldrexb r0, [r0]");
__ASM("bx lr");
}
/**
* @brief LDR Exclusive (16 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 16 bit values
*/
uint16_t __LDREXH(uint16_t *addr)
{
__ASM("ldrexh r0, [r0]");
__ASM("bx lr");
}
/**
* @brief LDR Exclusive (32 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 32 bit values
*/
uint32_t __LDREXW(uint32_t *addr)
{
__ASM("ldrex r0, [r0]");
__ASM("bx lr");
}
/**
* @brief STR Exclusive (8 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 8 bit values
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
__ASM("strexb r0, r0, [r1]");
__ASM("bx lr");
}
/**
* @brief STR Exclusive (16 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 16 bit values
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
__ASM("strexh r0, r0, [r1]");
__ASM("bx lr");
}
/**
* @brief STR Exclusive (32 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 32 bit values
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
__ASM("strex r0, r0, [r1]");
__ASM("bx lr");
}
#pragma diag_default=Pe940
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/**
* @brief Return the Process Stack Pointer
*
* @return ProcessStackPointer
*
* Return the actual process stack pointer
*/
uint32_t __get_PSP(void) __attribute__( ( naked ) );
uint32_t __get_PSP(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, psp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t" : "=r" (result) );
return(result);
}
/**
* @brief Set the Process Stack Pointer
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0\n\t"
"BX lr \n\t" : : "r" (topOfProcStack) );
}
/**
* @brief Return the Main Stack Pointer
*
* @return Main Stack Pointer
*
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
uint32_t __get_MSP(void) __attribute__( ( naked ) );
uint32_t __get_MSP(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, msp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t" : "=r" (result) );
return(result);
}
/**
* @brief Set the Main Stack Pointer
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0\n\t"
"BX lr \n\t" : : "r" (topOfMainStack) );
}
/**
* @brief Return the Base Priority value
*
* @return BasePriority
*
* Return the content of the base priority register
*/
uint32_t __get_BASEPRI(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
return(result);
}
/**
* @brief Set the Base Priority value
*
* @param basePri BasePriority
*
* Set the base priority register
*/
void __set_BASEPRI(uint32_t value)
{
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
}
/**
* @brief Return the Priority Mask value
*
* @return PriMask
*
* Return state of the priority mask bit from the priority mask register
*/
uint32_t __get_PRIMASK(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
}
/**
* @brief Set the Priority Mask value
*
* @param priMask PriMask
*
* Set the priority mask bit in the priority mask register
*/
void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
}
/**
* @brief Return the Fault Mask value
*
* @return FaultMask
*
* Return the content of the fault mask register
*/
uint32_t __get_FAULTMASK(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
/**
* @brief Set the Fault Mask value
*
* @param faultMask faultMask value
*
* Set the fault mask register
*/
void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
}
/**
* @brief Return the Control Register value
*
* @return Control value
*
* Return the content of the control register
*/
uint32_t __get_CONTROL(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
/**
* @brief Set the Control Register value
*
* @param control Control value
*
* Set the control register
*/
void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) );
}
/**
* @brief Reverse byte order in integer value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in integer value
*/
uint32_t __REV(uint32_t value)
{
uint32_t result=0;
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief Reverse byte order in unsigned short value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in unsigned short value
*/
uint32_t __REV16(uint16_t value)
{
uint32_t result=0;
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief Reverse byte order in signed short value with sign extension to integer
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in signed short value with sign extension to integer
*/
int32_t __REVSH(int16_t value)
{
uint32_t result=0;
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief Reverse bit order of value
*
* @param value value to reverse
* @return reversed value
*
* Reverse bit order of value
*/
uint32_t __RBIT(uint32_t value)
{
uint32_t result=0;
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief LDR Exclusive (8 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 8 bit value
*/
uint8_t __LDREXB(uint8_t *addr)
{
uint8_t result=0;
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/**
* @brief LDR Exclusive (16 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 16 bit values
*/
uint16_t __LDREXH(uint16_t *addr)
{
uint16_t result=0;
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/**
* @brief LDR Exclusive (32 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 32 bit values
*/
uint32_t __LDREXW(uint32_t *addr)
{
uint32_t result=0;
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/**
* @brief STR Exclusive (8 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 8 bit values
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
uint32_t result=0;
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/**
* @brief STR Exclusive (16 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 16 bit values
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
uint32_t result=0;
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
/**
* @brief STR Exclusive (32 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 32 bit values
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
uint32_t result=0;
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
return(result);
}
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
/* TASKING carm specific functions */
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all instrinsics,
* Including the CMSIS ones.
*/
#endif

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/**************************************************************************//**
* @file system_LPC13xx.c
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer Source File
* for the NXP LPC13xx Device Series
* @version V1.02
* @date 18. February 2010
*
* @note
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
// ******** Code Red **************
// * Changed USBCLK_SETUP to 1
// * Changed SYSPLLCTRL_Val to 0x25
// ********************************
#include <stdint.h>
#include "LPC13xx.h"
/*
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
*/
/*--------------------- Clock Configuration ----------------------------------
//
// <e> Clock Configuration
// <e1> System Clock Setup
// <e2> System Oscillator Enable
// <o3.1> Select System Oscillator Frequency Range
// <0=> 1 - 20 MHz
// <1=> 15 - 25 MHz
// </e2>
// <e4> Watchdog Oscillator Enable
// <o5.0..4> Select Divider for Fclkana
// <0=> 2 <1=> 4 <2=> 6 <3=> 8
// <4=> 10 <5=> 12 <6=> 14 <7=> 16
// <8=> 18 <9=> 20 <10=> 22 <11=> 24
// <12=> 26 <13=> 28 <14=> 30 <15=> 32
// <16=> 34 <17=> 36 <18=> 38 <19=> 40
// <20=> 42 <21=> 44 <22=> 46 <23=> 48
// <24=> 50 <25=> 52 <26=> 54 <27=> 56
// <28=> 58 <29=> 60 <30=> 62 <31=> 64
// <o5.5..8> Select Watchdog Oscillator Analog Frequency (Fclkana)
// <0=> Disabled
// <1=> 0.5 MHz
// <2=> 0.8 MHz
// <3=> 1.1 MHz
// <4=> 1.4 MHz
// <5=> 1.6 MHz
// <6=> 1.8 MHz
// <7=> 2.0 MHz
// <8=> 2.2 MHz
// <9=> 2.4 MHz
// <10=> 2.6 MHz
// <11=> 2.7 MHz
// <12=> 2.9 MHz
// <13=> 3.1 MHz
// <14=> 3.2 MHz
// <15=> 3.4 MHz
// </e4>
// <o6> Select Input Clock for sys_pllclkin (Register: SYSPLLCLKSEL)
// <0=> IRC Oscillator
// <1=> System Oscillator
// <2=> WDT Oscillator
// <3=> Invalid
// <e7> Use System PLL
// <i> F_pll = M * F_in
// <i> F_in must be in the range of 10 MHz to 25 MHz
// <o8.0..4> M: PLL Multiplier Selection
// <1-32><#-1>
// <o8.5..6> P: PLL Divider Selection
// <0=> 2
// <1=> 4
// <2=> 8
// <3=> 16
// <o8.7> DIRECT: Direct CCO Clock Output Enable
// <o8.8> BYPASS: PLL Bypass Enable
// </e7>
// <o9> Select Input Clock for Main clock (Register: MAINCLKSEL)
// <0=> IRC Oscillator
// <1=> Input Clock to System PLL
// <2=> WDT Oscillator
// <3=> System PLL Clock Out
// </e1>
// <e10> USB Clock Setup
// <e11> Use USB PLL
// <i> F_pll = M * F_in
// <i> F_in must be in the range of 10 MHz to 25 MHz
// <o12.0..1> Select Input Clock for usb_pllclkin (Register: USBPLLCLKSEL)
// <0=> IRC Oscillator
// <1=> System Oscillator
// <o13.0..4> M: PLL Multiplier Selection
// <1-32><#-1>
// <o13.5..6> P: PLL Divider Selection
// <0=> 2
// <1=> 4
// <2=> 8
// <3=> 16
// <o13.7> DIRECT: Direct CCO Clock Output Enable
// <o13.8> BYPASS: PLL Bypass Enable
// </e11>
// </e10>
// <o14.0..7> System AHB Divider <0-255>
// <i> 0 = is disabled
// <o15.0> SYS Clock Enable
// <o15.1> ROM Clock Enable
// <o15.2> RAM Clock Enable
// <o15.3> FLASH1 Clock Enable
// <o15.4> FLASH2 Clock Enable
// <o15.5> I2C Clock Enable
// <o15.6> GPIO Clock Enable
// <o15.7> CT16B0 Clock Enable
// <o15.8> CT16B1 Clock Enable
// <o15.9> CT32B0 Clock Enable
// <o15.10> CT32B1 Clock Enable
// <o15.11> SSP Clock Enable
// <o15.12> UART Clock Enable
// <o15.13> ADC Clock Enable
// <o15.14> USB_REG Clock Enable
// <o15.15> SWDT Clock Enable
// <o15.16> IOCON Clock Enable
// </e>
*/
#define CLOCK_SETUP 1
#define SYSCLK_SETUP 1
#define SYSOSC_SETUP 1
#define SYSOSCCTRL_Val 0x00000000
#define WDTOSC_SETUP 0
#define WDTOSCCTRL_Val 0x000000A0
#define SYSPLLCLKSEL_Val 0x00000001
#define SYSPLL_SETUP 1
#define SYSPLLCTRL_Val 0x00000025
#define MAINCLKSEL_Val 0x00000003
// ******** Code Red *********
// * Changed USBCLK_SETUP to 1
// ***************************
#define USBCLK_SETUP 1
#define USBPLL_SETUP 1
#define USBPLLCLKSEL_Val 0x00000001
#define USBPLLCTRL_Val 0x00000003
#define SYSAHBCLKDIV_Val 0x00000001
#define AHBCLKCTRL_Val 0x0001005F
/*--------------------- Memory Mapping Configuration -------------------------
//
// <e> Memory Mapping
// <o1.0..1> System Memory Remap (Register: SYSMEMREMAP)
// <0=> Bootloader mapped to address 0
// <1=> RAM mapped to address 0
// <2=> Flash mapped to address 0
// <3=> Flash mapped to address 0
// </e>
*/
#define MEMMAP_SETUP 0
#define SYSMEMREMAP_Val 0x00000001
/*
//-------- <<< end of configuration section >>> ------------------------------
*/
/*----------------------------------------------------------------------------
Check the register settings
*----------------------------------------------------------------------------*/
#define CHECK_RANGE(val, min, max) ((val < min) || (val > max))
#define CHECK_RSVD(val, mask) (val & mask)
/* Clock Configuration -------------------------------------------------------*/
#if (CHECK_RSVD((SYSOSCCTRL_Val), ~0x00000003))
#error "SYSOSCCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((WDTOSCCTRL_Val), ~0x000001FF))
#error "WDTOSCCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RANGE((SYSPLLCLKSEL_Val), 0, 2))
#error "SYSPLLCLKSEL: Value out of range!"
#endif
#if (CHECK_RSVD((SYSPLLCTRL_Val), ~0x000001FF))
#error "SYSPLLCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((MAINCLKSEL_Val), ~0x00000003))
#error "MAINCLKSEL: Invalid values of reserved bits!"
#endif
#if (CHECK_RANGE((USBPLLCLKSEL_Val), 0, 1))
#error "USBPLLCLKSEL: Value out of range!"
#endif
#if (CHECK_RSVD((USBPLLCTRL_Val), ~0x000001FF))
#error "USBPLLCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((USBPLLUEN_Val), ~0x00000001))
#error "USBPLLUEN: Invalid values of reserved bits!"
#endif
#if (CHECK_RANGE((SYSAHBCLKDIV_Val), 0, 255))
#error "SYSAHBCLKDIV: Value out of range!"
#endif
#if (CHECK_RSVD((AHBCLKCTRL_Val), ~0x0001FFFF))
#error "AHBCLKCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((SYSMEMREMAP_Val), ~0x00000003))
#error "SYSMEMREMAP: Invalid values of reserved bits!"
#endif
/*----------------------------------------------------------------------------
DEFINES
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define __XTAL (12000000UL) /* Oscillator frequency */
#define __SYS_OSC_CLK ( __XTAL) /* Main oscillator frequency */
#define __IRC_OSC_CLK (12000000UL) /* Internal RC oscillator frequency */
#define __FREQSEL ((WDTOSCCTRL_Val >> 5) & 0x0F)
#define __DIVSEL (((WDTOSCCTRL_Val & 0x1F) << 1) + 2)
#if (CLOCK_SETUP) /* Clock Setup */
#if (SYSCLK_SETUP) /* System Clock Setup */
#if (WDTOSC_SETUP) /* Watchdog Oscillator Setup*/
#if (__FREQSEL == 0)
#define __WDT_OSC_CLK ( 400000 / __DIVSEL)
#elif (__FREQSEL == 1)
#define __WDT_OSC_CLK ( 500000 / __DIVSEL)
#elif (__FREQSEL == 2)
#define __WDT_OSC_CLK ( 800000 / __DIVSEL)
#elif (__FREQSEL == 3)
#define __WDT_OSC_CLK (1100000 / __DIVSEL)
#elif (__FREQSEL == 4)
#define __WDT_OSC_CLK (1400000 / __DIVSEL)
#elif (__FREQSEL == 5)
#define __WDT_OSC_CLK (1600000 / __DIVSEL)
#elif (__FREQSEL == 6)
#define __WDT_OSC_CLK (1800000 / __DIVSEL)
#elif (__FREQSEL == 7)
#define __WDT_OSC_CLK (2000000 / __DIVSEL)
#elif (__FREQSEL == 8)
#define __WDT_OSC_CLK (2200000 / __DIVSEL)
#elif (__FREQSEL == 9)
#define __WDT_OSC_CLK (2400000 / __DIVSEL)
#elif (__FREQSEL == 10)
#define __WDT_OSC_CLK (2600000 / __DIVSEL)
#elif (__FREQSEL == 11)
#define __WDT_OSC_CLK (2700000 / __DIVSEL)
#elif (__FREQSEL == 12)
#define __WDT_OSC_CLK (2900000 / __DIVSEL)
#elif (__FREQSEL == 13)
#define __WDT_OSC_CLK (3100000 / __DIVSEL)
#elif (__FREQSEL == 14)
#define __WDT_OSC_CLK (3200000 / __DIVSEL)
#else
#define __WDT_OSC_CLK (3400000 / __DIVSEL)
#endif
#else
#define __WDT_OSC_CLK (1600000 / 2)
#endif // WDTOSC_SETUP
/* sys_pllclkin calculation */
#if ((SYSPLLCLKSEL_Val & 0x03) == 0)
#define __SYS_PLLCLKIN (__IRC_OSC_CLK)
#elif ((SYSPLLCLKSEL_Val & 0x03) == 1)
#define __SYS_PLLCLKIN (__SYS_OSC_CLK)
#elif ((SYSPLLCLKSEL_Val & 0x03) == 2)
#define __SYS_PLLCLKIN (__WDT_OSC_CLK)
#else
#define __SYS_PLLCLKIN (0)
#endif
#if (SYSPLL_SETUP) /* System PLL Setup */
#define __SYS_PLLCLKOUT (__SYS_PLLCLKIN * ((SYSPLLCTRL_Val & 0x01F) + 1))
#else
#define __SYS_PLLCLKOUT (__SYS_PLLCLKIN * (1))
#endif // SYSPLL_SETUP
/* main clock calculation */
#if ((MAINCLKSEL_Val & 0x03) == 0)
#define __MAIN_CLOCK (__IRC_OSC_CLK)
#elif ((MAINCLKSEL_Val & 0x03) == 1)
#define __MAIN_CLOCK (__SYS_PLLCLKIN)
#elif ((MAINCLKSEL_Val & 0x03) == 2)
#define __MAIN_CLOCK (__WDT_OSC_CLK)
#elif ((MAINCLKSEL_Val & 0x03) == 3)
#define __MAIN_CLOCK (__SYS_PLLCLKOUT)
#else
#define __MAIN_CLOCK (0)
#endif
#define __SYSTEM_CLOCK (__MAIN_CLOCK / SYSAHBCLKDIV_Val)
#else // SYSCLK_SETUP
#if (SYSAHBCLKDIV_Val == 0)
#define __SYSTEM_CLOCK (0)
#else
#define __SYSTEM_CLOCK (__XTAL / SYSAHBCLKDIV_Val)
#endif
#endif // SYSCLK_SETUP
#else
#define __SYSTEM_CLOCK (__XTAL)
#endif // CLOCK_SETUP
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/
/*----------------------------------------------------------------------------
Clock functions
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
uint32_t wdt_osc = 0;
/* Determine clock frequency according to clock register values */
switch ((LPC_SYSCON->WDTOSCCTRL >> 5) & 0x0F) {
case 0: wdt_osc = 400000; break;
case 1: wdt_osc = 500000; break;
case 2: wdt_osc = 800000; break;
case 3: wdt_osc = 1100000; break;
case 4: wdt_osc = 1400000; break;
case 5: wdt_osc = 1600000; break;
case 6: wdt_osc = 1800000; break;
case 7: wdt_osc = 2000000; break;
case 8: wdt_osc = 2200000; break;
case 9: wdt_osc = 2400000; break;
case 10: wdt_osc = 2600000; break;
case 11: wdt_osc = 2700000; break;
case 12: wdt_osc = 2900000; break;
case 13: wdt_osc = 3100000; break;
case 14: wdt_osc = 3200000; break;
case 15: wdt_osc = 3400000; break;
}
wdt_osc /= ((LPC_SYSCON->WDTOSCCTRL & 0x1F) << 1) + 2;
switch (LPC_SYSCON->MAINCLKSEL & 0x03) {
case 0: /* Internal RC oscillator */
SystemCoreClock = __IRC_OSC_CLK;
break;
case 1: /* Input Clock to System PLL */
switch (LPC_SYSCON->SYSPLLCLKSEL & 0x03) {
case 0: /* Internal RC oscillator */
SystemCoreClock = __IRC_OSC_CLK;
break;
case 1: /* System oscillator */
SystemCoreClock = __SYS_OSC_CLK;
break;
case 2: /* WDT Oscillator */
SystemCoreClock = wdt_osc;
break;
case 3: /* Reserved */
SystemCoreClock = 0;
break;
}
break;
case 2: /* WDT Oscillator */
SystemCoreClock = wdt_osc;
break;
case 3: /* System PLL Clock Out */
switch (LPC_SYSCON->SYSPLLCLKSEL & 0x03) {
case 0: /* Internal RC oscillator */
if (LPC_SYSCON->SYSPLLCTRL & 0x180) {
SystemCoreClock = __IRC_OSC_CLK;
} else {
SystemCoreClock = __IRC_OSC_CLK * ((LPC_SYSCON->SYSPLLCTRL & 0x01F) + 1);
}
break;
case 1: /* System oscillator */
if (LPC_SYSCON->SYSPLLCTRL & 0x180) {
SystemCoreClock = __SYS_OSC_CLK;
} else {
SystemCoreClock = __SYS_OSC_CLK * ((LPC_SYSCON->SYSPLLCTRL & 0x01F) + 1);
}
break;
case 2: /* WDT Oscillator */
if (LPC_SYSCON->SYSPLLCTRL & 0x180) {
SystemCoreClock = wdt_osc;
} else {
SystemCoreClock = wdt_osc * ((LPC_SYSCON->SYSPLLCTRL & 0x01F) + 1);
}
break;
case 3: /* Reserved */
SystemCoreClock = 0;
break;
}
break;
}
SystemCoreClock /= LPC_SYSCON->SYSAHBCLKDIV;
}
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System.
*/
void SystemInit (void)
{
#if (CLOCK_SETUP) /* Clock Setup */
#if (SYSCLK_SETUP) /* System Clock Setup */
#if (SYSOSC_SETUP) /* System Oscillator Setup */
uint32_t i;
LPC_SYSCON->PDRUNCFG &= ~(1 << 5); /* Power-up System Osc */
LPC_SYSCON->SYSOSCCTRL = SYSOSCCTRL_Val;
for (i = 0; i < 200; i++) __NOP();
LPC_SYSCON->SYSPLLCLKSEL = SYSPLLCLKSEL_Val; /* Select PLL Input */
LPC_SYSCON->SYSPLLCLKUEN = 0x01; /* Update Clock Source */
LPC_SYSCON->SYSPLLCLKUEN = 0x00; /* Toggle Update Register */
LPC_SYSCON->SYSPLLCLKUEN = 0x01;
while (!(LPC_SYSCON->SYSPLLCLKUEN & 0x01)); /* Wait Until Updated */
#if (SYSPLL_SETUP) /* System PLL Setup */
LPC_SYSCON->SYSPLLCTRL = SYSPLLCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 7); /* Power-up SYSPLL */
while (!(LPC_SYSCON->SYSPLLSTAT & 0x01)); /* Wait Until PLL Locked */
#endif
#endif
#if (WDTOSC_SETUP) /* Watchdog Oscillator Setup*/
LPC_SYSCON->WDTOSCCTRL = WDTOSCCTRL_Val;
LPC_SYSCON->PDRUNCFG &= ~(1 << 6); /* Power-up WDT Clock */
#endif
LPC_SYSCON->MAINCLKSEL = MAINCLKSEL_Val; /* Select PLL Clock Output */
LPC_SYSCON->MAINCLKUEN = 0x01; /* Update MCLK Clock Source */
LPC_SYSCON->MAINCLKUEN = 0x00; /* Toggle Update Register */
LPC_SYSCON->MAINCLKUEN = 0x01;
while (!(LPC_SYSCON->MAINCLKUEN & 0x01)); /* Wait Until Updated */
#endif
#if (USBCLK_SETUP) /* USB Clock Setup */
LPC_SYSCON->PDRUNCFG &= ~(1 << 10); /* Power-up USB PHY */
#if (USBPLL_SETUP) /* USB PLL Setup */
LPC_SYSCON->PDRUNCFG &= ~(1 << 8); /* Power-up USB PLL */
LPC_SYSCON->USBPLLCLKSEL = USBPLLCLKSEL_Val; /* Select PLL Input */
LPC_SYSCON->USBPLLCLKUEN = 0x01; /* Update Clock Source */
LPC_SYSCON->USBPLLCLKUEN = 0x00; /* Toggle Update Register */
LPC_SYSCON->USBPLLCLKUEN = 0x01;
while (!(LPC_SYSCON->USBPLLCLKUEN & 0x01)); /* Wait Until Updated */
LPC_SYSCON->USBPLLCTRL = USBPLLCTRL_Val;
while (!(LPC_SYSCON->USBPLLSTAT & 0x01)); /* Wait Until PLL Locked */
LPC_SYSCON->USBCLKSEL = 0x00; /* Select USB PLL */
#else
LPC_SYSCON->USBCLKSEL = 0x01; /* Select Main Clock */
#endif
#else
LPC_SYSCON->PDRUNCFG |= (1 << 10); /* Power-down USB PHY */
LPC_SYSCON->PDRUNCFG |= (1 << 8); /* Power-down USB PLL */
#endif
LPC_SYSCON->SYSAHBCLKDIV = SYSAHBCLKDIV_Val;
LPC_SYSCON->SYSAHBCLKCTRL = AHBCLKCTRL_Val;
#endif
#if (MEMMAP_SETUP || MEMMAP_INIT) /* Memory Mapping Setup */
LPC_SYSCON->SYSMEMREMAP = SYSMEMREMAP_Val;
#endif
}

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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>usbcomp_msd_cdc</name>
<comment></comment>
<projects>
<project>CMSISv1p30_LPC13xx</project>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
<dictionary>
<key>?name?</key>
<value></value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.append_environment</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
<value>all</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildArguments</key>
<value></value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildCommand</key>
<value>make</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
<value>${workspace_loc:/usbcomp_msd_cdc/Debug}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
<value>clean</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.contents</key>
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
<value>false</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
<value>all</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.stopOnError</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
<value>true</value>
</dictionary>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
</projectDescription>

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firmware/usbcomp_msd_cdc/AN composite device.docx Normal file
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firmware/usbcomp_msd_cdc/Debug/makefile Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include subdir.mk
-include src/subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
# All Target
all: usbcomp_msd_cdc.axf
# Tool invocations
usbcomp_msd_cdc.axf: $(OBJS) $(USER_OBJS)
@echo 'Building target: $@'
@echo 'Invoking: MCU Linker'
arm-none-eabi-gcc -nostdlib -L"/home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug" -Xlinker -Map=usbcomp_msd_cdc.map -Xlinker --gc-sections -mcpu=cortex-m3 -mthumb -T "usbcomp_msd_cdc_Debug.ld" -o"usbcomp_msd_cdc.axf" $(OBJS) $(USER_OBJS) $(LIBS)
@echo 'Finished building target: $@'
@echo ' '
$(MAKE) --no-print-directory post-build
# Other Targets
clean:
-$(RM) $(OBJS)$(C_DEPS)$(EXECUTABLES) usbcomp_msd_cdc.axf
-@echo ' '
post-build:
-@echo 'Performing post-build steps'
-arm-none-eabi-size usbcomp_msd_cdc.axf; arm-none-eabi-objcopy -O binary usbcomp_msd_cdc.axf usbcomp_msd_cdc.bin; checksum -v usbcomp_msd_cdc.bin;
-@echo ' '
.PHONY: all clean dependents
.SECONDARY: post-build
-include ../makefile.targets

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firmware/usbcomp_msd_cdc/Debug/objects.mk Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
USER_OBJS :=
LIBS := -lCMSISv1p30_LPC13xx

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firmware/usbcomp_msd_cdc/Debug/sources.mk Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
O_SRCS :=
C_SRCS :=
S_SRCS :=
S_UPPER_SRCS :=
OBJ_SRCS :=
ASM_SRCS :=
OBJS :=
C_DEPS :=
EXECUTABLES :=
# Every subdirectory with source files must be described here
SUBDIRS := \
src \

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firmware/usbcomp_msd_cdc/Debug/src/subdir.mk Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../src/DiskImg.c \
../src/cdcuser.c \
../src/clkconfig.c \
../src/cr_startup_lpc13.c \
../src/edubrm.c \
../src/mscuser.c \
../src/serial.c \
../src/usbcomp.c \
../src/usbcore.c \
../src/usbdesc.c \
../src/usbhw.c \
../src/usbuser.c
OBJS += \
./src/DiskImg.o \
./src/cdcuser.o \
./src/clkconfig.o \
./src/cr_startup_lpc13.o \
./src/edubrm.o \
./src/mscuser.o \
./src/serial.o \
./src/usbcomp.o \
./src/usbcore.o \
./src/usbdesc.o \
./src/usbhw.o \
./src/usbuser.o
C_DEPS += \
./src/DiskImg.d \
./src/cdcuser.d \
./src/clkconfig.d \
./src/cr_startup_lpc13.d \
./src/edubrm.d \
./src/mscuser.d \
./src/serial.d \
./src/usbcomp.d \
./src/usbcore.d \
./src/usbdesc.d \
./src/usbhw.d \
./src/usbuser.d
# Each subdirectory must supply rules for building sources it contributes
src/%.o: ../src/%.c
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -D__REDLIB__ -DDEBUG -D__CODE_RED -D__USE_CMSIS=CMSISv1p30_LPC13xx -I"/home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/inc" -I"/home/btr/lpc_xpresso/usbcomp_msd_cdc/inc" -O0 -g3 -Wall -c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -mcpu=cortex-m3 -mthumb -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -o"$@" "$<"
@echo 'Finished building: $<'
@echo ' '

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Archive member included because of file (symbol)
/home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
./src/serial.o (SystemCoreClock)
/usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcmp.o)
./src/edubrm.o (strcmp)
/usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcpy.o)
./src/usbcomp.o (strcpy)
/usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strlen.o)
./src/edubrm.o (strlen)
/usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memcpy.o)
./src/edubrm.o (memcpy)
/usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memset.o)
./src/edubrm.o (memset)
/usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
/usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memcpy.o) (__aeabi_memcpy)
Allocating common symbols
Common symbol size file
USB_AltSetting 0x1 ./src/usbcore.o
BulkBuf 0x40 ./src/mscuser.o
CBW 0x1f ./src/mscuser.o
Memory 0x1800 ./src/mscuser.o
EP0Buf 0x40 ./src/usbcore.o
USB_EndPointMask 0x4 ./src/usbcore.o
USB_DeviceAddress 0x1 ./src/usbcore.o
BulkBufOut 0x40 ./src/cdcuser.o
USB_EndPointStall 0x4 ./src/usbcore.o
NotificationBuf 0xa ./src/cdcuser.o
ser_in 0x88 ./src/serial.o
ser_txRestart 0x4 ./src/serial.o
Offset 0x4 ./src/mscuser.o
BulkBufIn 0x40 ./src/cdcuser.o
CSW 0xd ./src/mscuser.o
USB_EndPointHalt 0x4 ./src/usbcore.o
MemOK 0x4 ./src/mscuser.o
Length 0x4 ./src/mscuser.o
USB_Configuration 0x1 ./src/usbcore.o
BulkLen 0x1 ./src/mscuser.o
ser_lineState 0x2 ./src/serial.o
SetupPacket 0x8 ./src/usbcore.o
USB_NumInterfaces 0x1 ./src/usbcore.o
ser_out 0x88 ./src/serial.o
EP0Data 0x8 ./src/usbcore.o
CDC_OutBuf 0x48 ./src/cdcuser.o
USB_DeviceStatus 0x2 ./src/usbcore.o
Discarded input sections
.text 0x00000000 0x0 ./src/DiskImg.o
.data 0x00000000 0x0 ./src/DiskImg.o
.bss 0x00000000 0x0 ./src/DiskImg.o
.text 0x00000000 0x0 ./src/cdcuser.o
.data 0x00000000 0x0 ./src/cdcuser.o
.bss 0x00000000 0x0 ./src/cdcuser.o
.text 0x00000000 0x0 ./src/clkconfig.o
.data 0x00000000 0x0 ./src/clkconfig.o
.bss 0x00000000 0x0 ./src/clkconfig.o
.text.WDT_CLK_Setup
0x00000000 0xa0 ./src/clkconfig.o
.text.CLKOUT_Setup
0x00000000 0x74 ./src/clkconfig.o
.text 0x00000000 0x0 ./src/cr_startup_lpc13.o
.data 0x00000000 0x0 ./src/cr_startup_lpc13.o
.bss 0x00000000 0x0 ./src/cr_startup_lpc13.o
.text 0x00000000 0x0 ./src/edubrm.o
.data 0x00000000 0x0 ./src/edubrm.o
.bss 0x00000000 0x0 ./src/edubrm.o
.text.disableLED
0x00000000 0x20 ./src/edubrm.o
.text 0x00000000 0x0 ./src/mscuser.o
.data 0x00000000 0x0 ./src/mscuser.o
.bss 0x00000000 0x0 ./src/mscuser.o
.text 0x00000000 0x0 ./src/serial.o
.data 0x00000000 0x0 ./src/serial.o
.bss 0x00000000 0x0 ./src/serial.o
.text.ser_Write
0x00000000 0xd4 ./src/serial.o
.text 0x00000000 0x0 ./src/usbcomp.o
.data 0x00000000 0x0 ./src/usbcomp.o
.bss 0x00000000 0x0 ./src/usbcomp.o
.text.VCOM_Serial2Usb
0x00000000 0x60 ./src/usbcomp.o
.text.VCOM_Usb2Serial
0x00000000 0x50 ./src/usbcomp.o
.rodata 0x00000000 0x8 ./src/usbcomp.o
.text.VCOM_Usb2SerialTest
0x00000000 0x48 ./src/usbcomp.o
.bss.serBuf.2278
0x00000000 0x20 ./src/usbcomp.o
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0x00000000 0x20 ./src/usbcomp.o
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0x00000000 0x40 ./src/usbcomp.o
.text 0x00000000 0x0 ./src/usbcore.o
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.text 0x00000000 0x0 ./src/usbdesc.o
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.text 0x00000000 0x0 ./src/usbhw.o
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.bss 0x00000000 0x0 ./src/usbhw.o
.text.USB_WakeUp
0x00000000 0x2c ./src/usbhw.o
.text.USB_ClearEPBuf
0x00000000 0x20 ./src/usbhw.o
.text.USB_GetFrame
0x00000000 0x48 ./src/usbhw.o
.text 0x00000000 0x0 ./src/usbuser.o
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.text 0x00000000 0x0 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.bss 0x00000000 0x0 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.text.SystemCoreClockUpdate
0x00000000 0x358 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.text 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcmp.o)
.data 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcmp.o)
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.text 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcpy.o)
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.text.strcpy 0x00000000 0x44 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcpy.o)
.text 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strlen.o)
.data 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strlen.o)
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.text 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memcpy.o)
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.text 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memset.o)
.data 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memset.o)
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.text 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
.data 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
.bss 0x00000000 0x0 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
.text.__aeabi_memmove
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.text.__aeabi_memclr
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.text.__aeabi_memset
0x00000000 0xa /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
Memory Configuration
Name Origin Length Attributes
MFlash32 0x00000000 0x00008000 xr
RamLoc8 0x10000000 0x00002000 xrw
*default* 0x00000000 0xffffffff
Linker script and memory map
LOAD ./src/DiskImg.o
LOAD ./src/cdcuser.o
LOAD ./src/clkconfig.o
LOAD ./src/cr_startup_lpc13.o
LOAD ./src/edubrm.o
LOAD ./src/mscuser.o
LOAD ./src/serial.o
LOAD ./src/usbcomp.o
LOAD ./src/usbcore.o
LOAD ./src/usbdesc.o
LOAD ./src/usbhw.o
LOAD ./src/usbuser.o
LOAD /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a
START GROUP
LOAD /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a
LOAD /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a
END GROUP
0x00008000 __top_MFlash32 = 0x8000
0x10002000 __top_RamLoc8 = 0x10002000
.text 0x00000000 0x59e8
FILL mask 0xff
*(.isr_vector)
.isr_vector 0x00000000 0x124 ./src/cr_startup_lpc13.o
0x00000000 g_pfnVectors
0x00000124 . = ALIGN (0x4)
0x00000124 __section_table_start = .
0x00000124 __data_section_table = .
0x00000124 0x4 LONG 0x59e8 LOADADDR (.data)
0x00000128 0x4 LONG 0x10000000 ADDR (.data)
0x0000012c 0x4 LONG 0x14 SIZEOF (.data)
0x00000130 __data_section_table_end = .
0x00000130 __bss_section_table = .
0x00000130 0x4 LONG 0x10000014 ADDR (.bss)
0x00000134 0x4 LONG 0x1c8c SIZEOF (.bss)
0x00000138 __bss_section_table_end = .
0x00000138 __section_table_end = .
*(.after_vectors*)
*(.text*)
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0x00000138 CDC_RdOutBuf
.text.CDC_WrOutBuf
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0x000001b4 CDC_WrOutBuf
.text.CDC_OutBufAvailChar
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0x00000218 CDC_OutBufAvailChar
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0x00000250 CDC_Init
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0x000002cc 0x10 ./src/cdcuser.o
0x000002cc CDC_SendEncapsulatedCommand
.text.CDC_GetEncapsulatedResponse
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0x000002dc CDC_GetEncapsulatedResponse
.text.CDC_SetCommFeature
0x000002ec 0x1c ./src/cdcuser.o
0x000002ec CDC_SetCommFeature
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0x00000308 0x1c ./src/cdcuser.o
0x00000308 CDC_GetCommFeature
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0x00000324 CDC_ClearCommFeature
.text.CDC_SetLineCoding
0x00000340 0xd0 ./src/cdcuser.o
0x00000340 CDC_SetLineCoding
.text.CDC_GetLineCoding
0x00000410 0xb0 ./src/cdcuser.o
0x00000410 CDC_GetLineCoding
.text.CDC_SetControlLineState
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0x000004c0 CDC_SetControlLineState
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0x000004dc 0x1c ./src/cdcuser.o
0x000004dc CDC_SendBreak
.text.CDC_BulkIn
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0x000004f8 CDC_BulkIn
.text.CDC_BulkOut
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0x0000054c CDC_BulkOut
.text.CDC_GetSerialState
0x00000580 0x12c ./src/cdcuser.o
0x00000580 CDC_GetSerialState
.text.CDC_NotificationIn
0x000006ac 0xbc ./src/cdcuser.o
0x000006ac CDC_NotificationIn
.text.Reset_Handler
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0x00000768 Reset_Handler
0x00000768 ResetISR
.text.NMI_Handler
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0x000007e0 NMI_Handler
.text.HardFault_Handler
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0x000007e8 HardFault_Handler
.text.MemManage_Handler
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0x000007f0 MemManage_Handler
.text.BusFault_Handler
0x000007f8 0x8 ./src/cr_startup_lpc13.o
0x000007f8 BusFault_Handler
.text.UsageFault_Handler
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0x00000800 UsageFault_Handler
.text.SVCall_Handler
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0x00000808 SVCall_Handler
.text.DebugMon_Handler
0x00000810 0x8 ./src/cr_startup_lpc13.o
0x00000810 DebugMon_Handler
.text.PendSV_Handler
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0x00000818 PendSV_Handler
.text.SysTick_Handler
0x00000820 0x8 ./src/cr_startup_lpc13.o
0x00000820 SysTick_Handler
.text.IntDefaultHandler
0x00000828 0x8 ./src/cr_startup_lpc13.o
0x00000828 TIMER16_0_IRQHandler
0x00000828 TIMER32_0_IRQHandler
0x00000828 TIMER32_1_IRQHandler
0x00000828 PIOINT1_IRQHandler
0x00000828 SSP_IRQHandler
0x00000828 TIMER16_1_IRQHandler
0x00000828 USB_FIQHandler
0x00000828 ADC_IRQHandler
0x00000828 PIOINT2_IRQHandler
0x00000828 BOD_IRQHandler
0x00000828 WAKEUP_IRQHandler
0x00000828 PIOINT0_IRQHandler
0x00000828 I2C_IRQHandler
0x00000828 WDT_IRQHandler
0x00000828 PIOINT3_IRQHandler
0x00000828 FMC_IRQHandler
.text.VCOM_Brm2Usb
0x00000830 0xc ./src/edubrm.o
0x00000830 VCOM_Brm2Usb
.text.checkForCommand
0x0000083c 0x50 ./src/edubrm.o
0x0000083c checkForCommand
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0x0000088c enableLED
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0x000008b0 toggleLED
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0x000008ec sendToUSB
.text.commandReceived
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0x00000910 commandReceived
.text.VCOM_Usb2Brm
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0x00000944 VCOM_Usb2Brm
.text.MSC_SetStallEP
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0x00000a24 MSC_SetStallEP
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0x00000a7c MSC_Reset
.text.MSC_GetMaxLUN
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0x00000ab8 MSC_GetMaxLUN
.text.MSC_MemoryRead
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0x00000ad8 MSC_MemoryRead
.text.MSC_MemoryWrite
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0x00000be0 MSC_MemoryWrite
.text.MSC_MemoryVerify
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0x00000d18 MSC_MemoryVerify
.text.MSC_RWSetup
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0x00000e74 MSC_RWSetup
.text.DataInFormat
0x00000fec 0x64 ./src/mscuser.o
0x00000fec DataInFormat
.text.DataInTransfer
0x00001050 0x90 ./src/mscuser.o
0x00001050 DataInTransfer
.text.MSC_TestUnitReady
0x000010e0 0x48 ./src/mscuser.o
0x000010e0 MSC_TestUnitReady
.text.MSC_RequestSense
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0x00001128 MSC_RequestSense
.text.MSC_Inquiry
0x0000124c 0x228 ./src/mscuser.o
0x0000124c MSC_Inquiry
.text.MSC_ModeSense6
0x00001474 0x60 ./src/mscuser.o
0x00001474 MSC_ModeSense6
.text.MSC_ModeSense10
0x000014d4 0x98 ./src/mscuser.o
0x000014d4 MSC_ModeSense10
.text.MSC_ReadCapacity
0x0000156c 0x98 ./src/mscuser.o
0x0000156c MSC_ReadCapacity
.text.MSC_ReadFormatCapacity
0x00001604 0xd0 ./src/mscuser.o
0x00001604 MSC_ReadFormatCapacity
.text.MSC_GetCBW
0x000016d4 0x520 ./src/mscuser.o
0x000016d4 MSC_GetCBW
.text.MSC_SetCSW
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0x00001bf4 MSC_SetCSW
.text.MSC_BulkIn
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0x00001c30 MSC_BulkIn
.text.MSC_BulkOut
0x00001c9c 0x80 ./src/mscuser.o
0x00001c9c MSC_BulkOut
.text.NVIC_EnableIRQ
0x00001d1c 0x38 ./src/serial.o
.text.NVIC_DisableIRQ
0x00001d54 0x3c ./src/serial.o
.text.ser_OpenPort
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0x00001d90 ser_OpenPort
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0x00001e3c 0x54 ./src/serial.o
0x00001e3c ser_ClosePort
.text.ser_InitPort
0x00001e90 0x1c8 ./src/serial.o
0x00001e90 ser_InitPort
.text.ser_Read
0x00002058 0x9c ./src/serial.o
0x00002058 ser_Read
.text.ser_AvailChar
0x000020f4 0x38 ./src/serial.o
0x000020f4 ser_AvailChar
.text.ser_LineState
0x0000212c 0x30 ./src/serial.o
0x0000212c ser_LineState
.text.UART_IRQHandler
0x0000215c 0x11c ./src/serial.o
0x0000215c UART_IRQHandler
.text.VCOM_Init
0x00002278 0xc ./src/usbcomp.o
0x00002278 VCOM_Init
.text.VCOM_CheckSerialState
0x00002284 0x38 ./src/usbcomp.o
0x00002284 VCOM_CheckSerialState
.text.main 0x000022bc 0x88 ./src/usbcomp.o
0x000022bc main
.text.USB_ResetCore
0x00002344 0x60 ./src/usbcore.o
0x00002344 USB_ResetCore
.text.USB_SetupStage
0x000023a4 0x18 ./src/usbcore.o
0x000023a4 USB_SetupStage
.text.USB_DataInStage
0x000023bc 0x80 ./src/usbcore.o
0x000023bc USB_DataInStage
.text.USB_DataOutStage
0x0000243c 0x5c ./src/usbcore.o
0x0000243c USB_DataOutStage
.text.USB_StatusInStage
0x00002498 0x18 ./src/usbcore.o
0x00002498 USB_StatusInStage
.text.USB_StatusOutStage
0x000024b0 0x18 ./src/usbcore.o
0x000024b0 USB_StatusOutStage
.text.USB_ReqGetStatus
0x000024c8 0x138 ./src/usbcore.o
0x000024c8 USB_ReqGetStatus
.text.USB_ReqSetClrFeature
0x00002600 0x1f8 ./src/usbcore.o
0x00002600 USB_ReqSetClrFeature
.text.USB_ReqSetAddress
0x000027f8 0x48 ./src/usbcore.o
0x000027f8 USB_ReqSetAddress
.text.USB_ReqGetDescriptor
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0x00002840 USB_ReqGetDescriptor
.text.USB_ReqGetConfiguration
0x000029b8 0x3c ./src/usbcore.o
0x000029b8 USB_ReqGetConfiguration
.text.UsbAddPtr
0x000029f4 0x24 ./src/usbcore.o
0x000029f4 UsbAddPtr
.text.USB_ReqSetConfiguration
0x00002a18 0x30c ./src/usbcore.o
0x00002a18 USB_ReqSetConfiguration
.text.USB_ReqGetInterface
0x00002d24 0x78 ./src/usbcore.o
0x00002d24 USB_ReqGetInterface
.text.USB_ReqSetInterface
0x00002d9c 0x234 ./src/usbcore.o
0x00002d9c USB_ReqSetInterface
.text.USB_EndPoint0
0x00002fd0 0x5e4 ./src/usbcore.o
0x00002fd0 USB_EndPoint0
.text.NVIC_EnableIRQ
0x000035b4 0x38 ./src/usbhw.o
.text.USBIOClkConfig
0x000035ec 0xd4 ./src/usbhw.o
0x000035ec USBIOClkConfig
.text.delay 0x000036c0 0x2c ./src/usbhw.o
0x000036c0 delay
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0x000036ec EPAdr
.text.WrCmd 0x00003720 0x40 ./src/usbhw.o
0x00003720 WrCmd
.text.WrCmdDat
0x00003760 0x20 ./src/usbhw.o
0x00003760 WrCmdDat
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0x00003780 WrCmdEP
.text.RdCmdDat
0x000037b0 0x4c ./src/usbhw.o
0x000037b0 RdCmdDat
.text.USB_Init
0x000037fc 0x1c ./src/usbhw.o
0x000037fc USB_Init
.text.USB_Connect
0x00003818 0x34 ./src/usbhw.o
0x00003818 USB_Connect
.text.USB_Reset
0x0000384c 0x2c ./src/usbhw.o
0x0000384c USB_Reset
.text.USB_Suspend
0x00003878 0xc ./src/usbhw.o
0x00003878 USB_Suspend
.text.USB_Resume
0x00003884 0xc ./src/usbhw.o
0x00003884 USB_Resume
.text.USB_WakeUpCfg
0x00003890 0x14 ./src/usbhw.o
0x00003890 USB_WakeUpCfg
.text.USB_SetAddress
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0x000038a4 USB_SetAddress
.text.USB_Configure
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0x000038ec USB_Configure
.text.USB_ConfigEP
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0x00003920 USB_ConfigEP
.text.USB_DirCtrlEP
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0x00003934 USB_DirCtrlEP
.text.USB_EnableEP
0x00003948 0x30 ./src/usbhw.o
0x00003948 USB_EnableEP
.text.USB_DisableEP
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0x00003978 USB_DisableEP
.text.USB_ResetEP
0x000039ac 0x30 ./src/usbhw.o
0x000039ac USB_ResetEP
.text.USB_SetStallEP
0x000039dc 0x34 ./src/usbhw.o
0x000039dc USB_SetStallEP
.text.USB_ClrStallEP
0x00003a10 0x30 ./src/usbhw.o
0x00003a10 USB_ClrStallEP
.text.USB_ReadEP
0x00003a40 0xac ./src/usbhw.o
0x00003a40 USB_ReadEP
.text.USB_WriteEP
0x00003aec 0x98 ./src/usbhw.o
0x00003aec USB_WriteEP
.text.USB_IRQHandler
0x00003b84 0x184 ./src/usbhw.o
0x00003b84 USB_IRQHandler
.text.USB_Reset_Event
0x00003d08 0xc ./src/usbuser.o
0x00003d08 USB_Reset_Event
.text.USB_Suspend_Event
0x00003d14 0xc ./src/usbuser.o
0x00003d14 USB_Suspend_Event
.text.USB_Resume_Event
0x00003d20 0xc ./src/usbuser.o
0x00003d20 USB_Resume_Event
.text.USB_Configure_Event
0x00003d2c 0xc ./src/usbuser.o
0x00003d2c USB_Configure_Event
.text.USB_EndPoint1
0x00003d38 0x40 ./src/usbuser.o
0x00003d38 USB_EndPoint1
.text.USB_EndPoint2
0x00003d78 0x28 ./src/usbuser.o
0x00003d78 USB_EndPoint2
.text.USB_EndPoint3
0x00003da0 0x28 ./src/usbuser.o
0x00003da0 USB_EndPoint3
.text.__NOP 0x00003dc8 0xc /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.text.SystemInit
0x00003dd4 0x1f8 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
0x00003dd4 SystemInit
.text.strcmp 0x00003fcc 0x4a /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcmp.o)
0x00003fcc strcmp
.text.strlen 0x00004016 0x4c /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strlen.o)
0x00004016 strlen
.text.memcpy 0x00004062 0x4 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memcpy.o)
0x00004062 memcpy
.text.memset 0x00004066 0x4 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memset.o)
0x00004066 memset
.text.__aeabi_memcpy
0x0000406a 0x26 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
0x0000406a __aeabi_memcpy
0x0000406a __aeabi_memcpy4
0x0000406a __aeabi_memcpy8
.text.__aeabi_memset_lowlevel
0x00004090 0x24 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
0x00004090 __aeabi_lowlevel_memset
*(.rodata .rodata.*)
.rodata.DiskImage
0x000040b4 0x1800 ./src/DiskImg.o
0x000040b4 DiskImage
.rodata 0x000058b4 0x10 ./src/edubrm.o
.rodata.USB_DeviceDescriptor
0x000058c4 0x14 ./src/usbdesc.o
0x000058c4 USB_DeviceDescriptor
.rodata.USB_ConfigDescriptor
0x000058d8 0x64 ./src/usbdesc.o
0x000058d8 USB_ConfigDescriptor
.rodata.USB_StringDescriptor
0x0000593c 0x98 ./src/usbdesc.o
0x0000593c USB_StringDescriptor
.rodata.USB_P_EP
0x000059d4 0x14 ./src/usbuser.o
0x000059d4 USB_P_EP
0x000059e8 . = ALIGN (0x4)
.glue_7 0x000059e8 0x0
.glue_7 0x00000000 0x0 linker stubs
.glue_7t 0x000059e8 0x0
.glue_7t 0x00000000 0x0 linker stubs
.vfp11_veneer 0x000059e8 0x0
.vfp11_veneer 0x00000000 0x0 linker stubs
.v4_bx 0x000059e8 0x0
.v4_bx 0x00000000 0x0 linker stubs
.ARM.extab
*(.ARM.extab* .gnu.linkonce.armextab.*)
0x000059e8 __exidx_start = .
.ARM.exidx
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
0x000059e8 __exidx_end = .
0x000059e8 _etext = .
.uninit_RESERVED
*(.bss.$RESERVED*)
.data 0x10000000 0x14 load address 0x000059e8
FILL mask 0xff
0x10000000 _data = .
*(vtable)
*(.data*)
.data.CDC_LineCoding
0x10000000 0x8 ./src/cdcuser.o
0x10000000 CDC_LineCoding
.data.CDC_DepInEmpty
0x10000008 0x2 ./src/cdcuser.o
0x10000008 CDC_DepInEmpty
*fill* 0x1000000a 0x2 00
.data.ulLEDState
0x1000000c 0x4 ./src/edubrm.o
.data 0x10000010 0x4 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
0x10000010 SystemCoreClock
0x10000014 . = ALIGN (0x4)
0x10000014 _edata = .
.bss 0x10000014 0x1c8c load address 0x000059fc
0x10000014 _bss = .
*(.bss*)
.bss.CDC_SerialState
0x10000014 0x2 ./src/cdcuser.o
0x10000014 CDC_SerialState
*fill* 0x10000016 0x2 00
.bss.cmdInbuffer
0x10000018 0x100 ./src/edubrm.o
.bss.cmdInbufferIndex
0x10000118 0x4 ./src/edubrm.o
0x10000118 cmdInbufferIndex
.bss.serBuf.2294
0x1000011c 0x20 ./src/edubrm.o
.bss.receivedCommand.2299
0x1000013c 0x80 ./src/edubrm.o
.bss.BulkStage
0x100001bc 0x1 ./src/mscuser.o
0x100001bc BulkStage
*fill* 0x100001bd 0x1 00
.bss.serialState.2287
0x100001be 0x2 ./src/usbcomp.o
.bss.serialState.1256
0x100001c0 0x2 ./src/usbuser.o
*(COMMON)
*fill* 0x100001c2 0x2 00
COMMON 0x100001c4 0xd4 ./src/cdcuser.o
0x100001c4 BulkBufOut
0x10000204 NotificationBuf
0x10000210 BulkBufIn
0x10000250 CDC_OutBuf
COMMON 0x10000298 0x187d ./src/mscuser.o
0x10000298 BulkBuf
0x100002d8 CBW
0x100002f8 Memory
0x10001af8 Offset
0x10001afc CSW
0x10001b0c MemOK
0x10001b10 Length
0x10001b14 BulkLen
*fill* 0x10001b15 0x3 00
COMMON 0x10001b18 0x118 ./src/serial.o
0x10001b18 ser_in
0x10001ba0 ser_txRestart
0x10001ba4 ser_lineState
0x10001ba8 ser_out
COMMON 0x10001c30 0x6e ./src/usbcore.o
0x10001c30 USB_AltSetting
0x10001c34 EP0Buf
0x10001c74 USB_EndPointMask
0x10001c78 USB_DeviceAddress
0x10001c7c USB_EndPointStall
0x10001c80 USB_EndPointHalt
0x10001c84 USB_Configuration
0x10001c88 SetupPacket
0x10001c90 USB_NumInterfaces
0x10001c94 EP0Data
0x10001c9c USB_DeviceStatus
0x10001ca0 . = ALIGN (0x4)
*fill* 0x10001c9e 0x2 00
0x10001ca0 _ebss = .
0x10001ca0 PROVIDE (end, .)
0x10001ca0 PROVIDE (_pvHeapStart, .)
0x10002000 PROVIDE (_vStackTop, (__top_RamLoc8 - 0x0))
OUTPUT(usbcomp_msd_cdc.axf elf32-littlearm)
.debug_abbrev 0x00000000 0xfd4
.debug_abbrev 0x00000000 0x54 ./src/DiskImg.o
.debug_abbrev 0x00000054 0x16c ./src/cdcuser.o
.debug_abbrev 0x000001c0 0xb7 ./src/clkconfig.o
.debug_abbrev 0x00000277 0xdf ./src/cr_startup_lpc13.o
.debug_abbrev 0x00000356 0x174 ./src/edubrm.o
.debug_abbrev 0x000004ca 0x183 ./src/mscuser.o
.debug_abbrev 0x0000064d 0x1ec ./src/serial.o
.debug_abbrev 0x00000839 0x10e ./src/usbcomp.o
.debug_abbrev 0x00000947 0x234 ./src/usbcore.o
.debug_abbrev 0x00000b7b 0x6c ./src/usbdesc.o
.debug_abbrev 0x00000be7 0x223 ./src/usbhw.o
.debug_abbrev 0x00000e0a 0xe2 ./src/usbuser.o
.debug_abbrev 0x00000eec 0xe8 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_info 0x00000000 0x4b18
.debug_info 0x00000000 0x5c ./src/DiskImg.o
.debug_info 0x0000005c 0x4d9 ./src/cdcuser.o
.debug_info 0x00000535 0x524 ./src/clkconfig.o
.debug_info 0x00000a59 0x1f4 ./src/cr_startup_lpc13.o
.debug_info 0x00000c4d 0x37d ./src/edubrm.o
.debug_info 0x00000fca 0x486 ./src/mscuser.o
.debug_info 0x00001450 0xed2 ./src/serial.o
.debug_info 0x00002322 0x6b5 ./src/usbcomp.o
.debug_info 0x000029d7 0x87f ./src/usbcore.o
.debug_info 0x00003256 0xf3 ./src/usbdesc.o
.debug_info 0x00003349 0x10b9 ./src/usbhw.o
.debug_info 0x00004402 0x1c9 ./src/usbuser.o
.debug_info 0x000045cb 0x54d /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_line 0x00000000 0x31b6
.debug_line 0x00000000 0x67 ./src/DiskImg.o
.debug_line 0x00000067 0x455 ./src/cdcuser.o
.debug_line 0x000004bc 0x314 ./src/clkconfig.o
.debug_line 0x000007d0 0x361 ./src/cr_startup_lpc13.o
.debug_line 0x00000b31 0x432 ./src/edubrm.o
.debug_line 0x00000f63 0x58b ./src/mscuser.o
.debug_line 0x000014ee 0x3f6 ./src/serial.o
.debug_line 0x000018e4 0x415 ./src/usbcomp.o
.debug_line 0x00001cf9 0x5ce ./src/usbcore.o
.debug_line 0x000022c7 0x2c3 ./src/usbdesc.o
.debug_line 0x0000258a 0x580 ./src/usbhw.o
.debug_line 0x00002b0a 0x366 ./src/usbuser.o
.debug_line 0x00002e70 0x346 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_macinfo 0x00000000 0x40132
.debug_macinfo
0x00000000 0xce3 ./src/DiskImg.o
.debug_macinfo
0x00000ce3 0x4190 ./src/cdcuser.o
.debug_macinfo
0x00004e73 0x604f ./src/clkconfig.o
.debug_macinfo
0x0000aec2 0x272c ./src/cr_startup_lpc13.o
.debug_macinfo
0x0000d5ee 0x7ce2 ./src/edubrm.o
.debug_macinfo
0x000152d0 0x3821 ./src/mscuser.o
.debug_macinfo
0x00018af1 0x6188 ./src/serial.o
.debug_macinfo
0x0001ec79 0x7d0c ./src/usbcomp.o
.debug_macinfo
0x00026985 0x4687 ./src/usbcore.o
.debug_macinfo
0x0002b00c 0x449f ./src/usbdesc.o
.debug_macinfo
0x0002f4ab 0x7423 ./src/usbhw.o
.debug_macinfo
0x000368ce 0x355b ./src/usbuser.o
.debug_macinfo
0x00039e29 0x6309 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_pubnames
0x00000000 0xc8e
.debug_pubnames
0x00000000 0x20 ./src/DiskImg.o
.debug_pubnames
0x00000020 0x201 ./src/cdcuser.o
.debug_pubnames
0x00000221 0x35 ./src/clkconfig.o
.debug_pubnames
0x00000256 0xec ./src/cr_startup_lpc13.o
.debug_pubnames
0x00000342 0xaa ./src/edubrm.o
.debug_pubnames
0x000003ec 0x1e5 ./src/mscuser.o
.debug_pubnames
0x000005d1 0xd4 ./src/serial.o
.debug_pubnames
0x000006a5 0x83 ./src/usbcomp.o
.debug_pubnames
0x00000728 0x243 ./src/usbcore.o
.debug_pubnames
0x0000096b 0x5d ./src/usbdesc.o
.debug_pubnames
0x000009c8 0x1cb ./src/usbhw.o
.debug_pubnames
0x00000b93 0xac ./src/usbuser.o
.debug_pubnames
0x00000c3f 0x4f /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_str 0x00000000 0x17da
.debug_str 0x00000000 0x61 ./src/DiskImg.o
.debug_str 0x00000061 0x2ee ./src/cdcuser.o
0x381 (size before relaxing)
.debug_str 0x0000034f 0x2f0 ./src/clkconfig.o
0x3aa (size before relaxing)
.debug_str 0x0000063f 0x108 ./src/cr_startup_lpc13.o
0x1cb (size before relaxing)
.debug_str 0x00000747 0xeb ./src/edubrm.o
0x1ef (size before relaxing)
.debug_str 0x00000832 0x1e9 ./src/mscuser.o
0x2c9 (size before relaxing)
.debug_str 0x00000a1b 0x637 ./src/serial.o
0xa3d (size before relaxing)
.debug_str 0x00001052 0x88 ./src/usbcomp.o
0x471 (size before relaxing)
.debug_str 0x000010da 0x423 ./src/usbcore.o
0x59c (size before relaxing)
.debug_str 0x000014fd 0x11 ./src/usbdesc.o
0x109 (size before relaxing)
.debug_str 0x0000150e 0x1d4 ./src/usbhw.o
0xb0f (size before relaxing)
.debug_str 0x000016e2 0x82 ./src/usbuser.o
0x17f (size before relaxing)
.debug_str 0x00001764 0x76 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
0x3cf (size before relaxing)
.comment 0x00000000 0x306
.comment 0x00000000 0x2b ./src/DiskImg.o
.comment 0x0000002b 0x2b ./src/cdcuser.o
.comment 0x00000056 0x2b ./src/clkconfig.o
.comment 0x00000081 0x2b ./src/cr_startup_lpc13.o
.comment 0x000000ac 0x2b ./src/edubrm.o
.comment 0x000000d7 0x2b ./src/mscuser.o
.comment 0x00000102 0x2b ./src/serial.o
.comment 0x0000012d 0x2b ./src/usbcomp.o
.comment 0x00000158 0x2b ./src/usbcore.o
.comment 0x00000183 0x2b ./src/usbdesc.o
.comment 0x000001ae 0x2b ./src/usbhw.o
.comment 0x000001d9 0x2b ./src/usbuser.o
.comment 0x00000204 0x2b /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.comment 0x0000022f 0x2b /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcmp.o)
.comment 0x0000025a 0x2b /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcpy.o)
.comment 0x00000285 0x2b /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strlen.o)
.comment 0x000002b0 0x2b /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memcpy.o)
.comment 0x000002db 0x2b /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memset.o)
.ARM.attributes
0x00000000 0x2f
.ARM.attributes
0x00000000 0x31 ./src/DiskImg.o
.ARM.attributes
0x00000031 0x31 ./src/cdcuser.o
.ARM.attributes
0x00000062 0x31 ./src/clkconfig.o
.ARM.attributes
0x00000093 0x31 ./src/cr_startup_lpc13.o
.ARM.attributes
0x000000c4 0x31 ./src/edubrm.o
.ARM.attributes
0x000000f5 0x31 ./src/mscuser.o
.ARM.attributes
0x00000126 0x31 ./src/serial.o
.ARM.attributes
0x00000157 0x31 ./src/usbcomp.o
.ARM.attributes
0x00000188 0x31 ./src/usbcore.o
.ARM.attributes
0x000001b9 0x31 ./src/usbdesc.o
.ARM.attributes
0x000001ea 0x31 ./src/usbhw.o
.ARM.attributes
0x0000021b 0x31 ./src/usbuser.o
.ARM.attributes
0x0000024c 0x31 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.ARM.attributes
0x0000027d 0x31 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcmp.o)
.ARM.attributes
0x000002ae 0x31 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strcpy.o)
.ARM.attributes
0x000002df 0x31 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(strlen.o)
.ARM.attributes
0x00000310 0x31 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memcpy.o)
.ARM.attributes
0x00000341 0x31 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/../../../../arm-none-eabi/lib/thumb2/libcr_c.a(memset.o)
.ARM.attributes
0x00000372 0x21 /usr/local/LPCXpresso/tools/bin/../lib/gcc/arm-none-eabi/4.4.1/thumb2/libcr_eabihelpers.a(memcpy.o)
.debug_loc 0x00000000 0x1923
.debug_loc 0x00000000 0x35f ./src/cdcuser.o
.debug_loc 0x0000035f 0x6e ./src/clkconfig.o
.debug_loc 0x000003cd 0x1e5 ./src/cr_startup_lpc13.o
.debug_loc 0x000005b2 0x188 ./src/edubrm.o
.debug_loc 0x0000073a 0x3a4 ./src/mscuser.o
.debug_loc 0x00000ade 0x20e ./src/serial.o
.debug_loc 0x00000cec 0x13e ./src/usbcomp.o
.debug_loc 0x00000e2a 0x31c ./src/usbcore.o
.debug_loc 0x00001146 0x5f3 ./src/usbhw.o
.debug_loc 0x00001739 0x151 ./src/usbuser.o
.debug_loc 0x0000188a 0x99 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_aranges 0x00000000 0x510
.debug_aranges
0x00000000 0xa0 ./src/cdcuser.o
.debug_aranges
0x000000a0 0x28 ./src/clkconfig.o
.debug_aranges
0x000000c8 0x70 ./src/cr_startup_lpc13.o
.debug_aranges
0x00000138 0x58 ./src/edubrm.o
.debug_aranges
0x00000190 0xb8 ./src/mscuser.o
.debug_aranges
0x00000248 0x68 ./src/serial.o
.debug_aranges
0x000002b0 0x48 ./src/usbcomp.o
.debug_aranges
0x000002f8 0x98 ./src/usbcore.o
.debug_aranges
0x00000390 0x100 ./src/usbhw.o
.debug_aranges
0x00000490 0x50 ./src/usbuser.o
.debug_aranges
0x000004e0 0x30 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_ranges 0x00000000 0x4b8
.debug_ranges 0x00000000 0x98 ./src/cdcuser.o
.debug_ranges 0x00000098 0x20 ./src/clkconfig.o
.debug_ranges 0x000000b8 0x68 ./src/cr_startup_lpc13.o
.debug_ranges 0x00000120 0x50 ./src/edubrm.o
.debug_ranges 0x00000170 0xb0 ./src/mscuser.o
.debug_ranges 0x00000220 0x60 ./src/serial.o
.debug_ranges 0x00000280 0x40 ./src/usbcomp.o
.debug_ranges 0x000002c0 0x90 ./src/usbcore.o
.debug_ranges 0x00000350 0xf8 ./src/usbhw.o
.debug_ranges 0x00000448 0x48 ./src/usbuser.o
.debug_ranges 0x00000490 0x28 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)
.debug_frame 0x00000000 0xf00
.debug_frame 0x00000000 0x1ec ./src/cdcuser.o
.debug_frame 0x000001ec 0x48 ./src/clkconfig.o
.debug_frame 0x00000234 0x120 ./src/cr_startup_lpc13.o
.debug_frame 0x00000354 0xec ./src/edubrm.o
.debug_frame 0x00000440 0x250 ./src/mscuser.o
.debug_frame 0x00000690 0x12c ./src/serial.o
.debug_frame 0x000007bc 0xcc ./src/usbcomp.o
.debug_frame 0x00000888 0x1d8 ./src/usbcore.o
.debug_frame 0x00000a60 0x368 ./src/usbhw.o
.debug_frame 0x00000dc8 0xd4 ./src/usbuser.o
.debug_frame 0x00000e9c 0x64 /home/btr/lpc_xpresso/CMSISv1p30_LPC13xx/Debug/libCMSISv1p30_LPC13xx.a(system_LPC13xx.o)

98
firmware/usbcomp_msd_cdc/Debug/usbcomp_msd_cdc_Debug.ld Normal file
View file

@ -0,0 +1,98 @@
/*
* GENERATED FILE - DO NOT EDIT
* (C) Code Red Technologies Ltd, 2008-10
* Generated linker script file for LPC1343
* Created from nxp_lpc13_c.ld (vLPCXpresso 3.8 (2 [Build 129] [31/01/2011] ))
* By LPCXpresso 3.8.2 [Build 129] [31/01/2011] on Fri Apr 01 20:01:18 CEST 2011
*/
INCLUDE "usbcomp_msd_cdc_Debug_lib.ld"
INCLUDE "usbcomp_msd_cdc_Debug_mem.ld"
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data)) ;
LONG( SIZEOF(.data));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
*(.text*)
*(.rodata .rodata.*)
. = ALIGN(4);
} > MFlash32
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash32
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > MFlash32
__exidx_end = .;
_etext = .;
/* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
} > RamLoc8
.data : ALIGN(4)
{
FILL(0xff)
_data = .;
*(vtable)
*(.data*)
. = ALIGN(4) ;
_edata = .;
} > RamLoc8 AT>MFlash32
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > RamLoc8
PROVIDE(_pvHeapStart = .);
PROVIDE(_vStackTop = __top_RamLoc8 - 0);
}

8
firmware/usbcomp_msd_cdc/Debug/usbcomp_msd_cdc_Debug_lib.ld Normal file
View file

@ -0,0 +1,8 @@
/*
* GENERATED FILE - DO NOT EDIT
* (C) Code Red Technologies Ltd, 2008-9
* Generated linker script library include file for Redlib (none)
* (created from redlib_none_c.ld (LPCXpresso 3.8.2 [Build 129] [31/01/2011] ) on Fri Apr 01 20:01:18 CEST 2011)
*/
GROUP(libcr_c.a libcr_eabihelpers.a)

18
firmware/usbcomp_msd_cdc/Debug/usbcomp_msd_cdc_Debug_mem.ld Normal file
View file

@ -0,0 +1,18 @@
/*
* GENERATED FILE - DO NOT EDIT
* (C) Code Red Technologies Ltd, 2008-9
* Generated linker script include file for
* (created from LinkMemoryTemplate (LPCXpresso 3.8.2 [Build 129] [31/01/2011] ) on Fri Apr 01 20:01:18 CEST 2011)
*/
MEMORY
{
/* Define each memory region */
MFlash32 (rx) : ORIGIN = 0x0, LENGTH = 0x8000 /* 32k */
RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8k */
}
/* Define a symbol for the top of each memory region */
__top_MFlash32 = 0x0 + 0x8000;
__top_RamLoc8 = 0x10000000 + 0x2000;

236
firmware/usbcomp_msd_cdc/inc/cdc.h Normal file
View file

@ -0,0 +1,236 @@
/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: CDC.h
* Purpose: USB Communication Device Class Definitions
* Version: V1.00
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __CDC_H
#define __CDC_H
/*----------------------------------------------------------------------------
* Definitions based on usbcdc11.pdf (www.usb.org)
*---------------------------------------------------------------------------*/
// Communication device class specification version 1.10
#define CDC_V1_10 0x0110
// Communication interface class code
// (usbcdc11.pdf, 4.2, Table 15)
#define CDC_COMMUNICATION_INTERFACE_CLASS 0x02
// Communication interface class subclass codes
// (usbcdc11.pdf, 4.3, Table 16)
#define CDC_DIRECT_LINE_CONTROL_MODEL 0x01
#define CDC_ABSTRACT_CONTROL_MODEL 0x02
#define CDC_TELEPHONE_CONTROL_MODEL 0x03
#define CDC_MULTI_CHANNEL_CONTROL_MODEL 0x04
#define CDC_CAPI_CONTROL_MODEL 0x05
#define CDC_ETHERNET_NETWORKING_CONTROL_MODEL 0x06
#define CDC_ATM_NETWORKING_CONTROL_MODEL 0x07
// Communication interface class control protocol codes
// (usbcdc11.pdf, 4.4, Table 17)
#define CDC_PROTOCOL_COMMON_AT_COMMANDS 0x01
// Data interface class code
// (usbcdc11.pdf, 4.5, Table 18)
#define CDC_DATA_INTERFACE_CLASS 0x0A
// Data interface class protocol codes
// (usbcdc11.pdf, 4.7, Table 19)
#define CDC_PROTOCOL_ISDN_BRI 0x30
#define CDC_PROTOCOL_HDLC 0x31
#define CDC_PROTOCOL_TRANSPARENT 0x32
#define CDC_PROTOCOL_Q921_MANAGEMENT 0x50
#define CDC_PROTOCOL_Q921_DATA_LINK 0x51
#define CDC_PROTOCOL_Q921_MULTIPLEXOR 0x52
#define CDC_PROTOCOL_V42 0x90
#define CDC_PROTOCOL_EURO_ISDN 0x91
#define CDC_PROTOCOL_V24_RATE_ADAPTATION 0x92
#define CDC_PROTOCOL_CAPI 0x93
#define CDC_PROTOCOL_HOST_BASED_DRIVER 0xFD
#define CDC_PROTOCOL_DESCRIBED_IN_PUFD 0xFE
// Type values for bDescriptorType field of functional descriptors
// (usbcdc11.pdf, 5.2.3, Table 24)
#define CDC_CS_INTERFACE 0x24
#define CDC_CS_ENDPOINT 0x25
// Type values for bDescriptorSubtype field of functional descriptors
// (usbcdc11.pdf, 5.2.3, Table 25)
#define CDC_HEADER 0x00
#define CDC_CALL_MANAGEMENT 0x01
#define CDC_ABSTRACT_CONTROL_MANAGEMENT 0x02
#define CDC_DIRECT_LINE_MANAGEMENT 0x03
#define CDC_TELEPHONE_RINGER 0x04
#define CDC_REPORTING_CAPABILITIES 0x05
#define CDC_UNION 0x06
#define CDC_COUNTRY_SELECTION 0x07
#define CDC_TELEPHONE_OPERATIONAL_MODES 0x08
#define CDC_USB_TERMINAL 0x09
#define CDC_NETWORK_CHANNEL 0x0A
#define CDC_PROTOCOL_UNIT 0x0B
#define CDC_EXTENSION_UNIT 0x0C
#define CDC_MULTI_CHANNEL_MANAGEMENT 0x0D
#define CDC_CAPI_CONTROL_MANAGEMENT 0x0E
#define CDC_ETHERNET_NETWORKING 0x0F
#define CDC_ATM_NETWORKING 0x10
// CDC class-specific request codes
// (usbcdc11.pdf, 6.2, Table 46)
// see Table 45 for info about the specific requests.
#define CDC_SEND_ENCAPSULATED_COMMAND 0x00
#define CDC_GET_ENCAPSULATED_RESPONSE 0x01
#define CDC_SET_COMM_FEATURE 0x02
#define CDC_GET_COMM_FEATURE 0x03
#define CDC_CLEAR_COMM_FEATURE 0x04
#define CDC_SET_AUX_LINE_STATE 0x10
#define CDC_SET_HOOK_STATE 0x11
#define CDC_PULSE_SETUP 0x12
#define CDC_SEND_PULSE 0x13
#define CDC_SET_PULSE_TIME 0x14
#define CDC_RING_AUX_JACK 0x15
#define CDC_SET_LINE_CODING 0x20
#define CDC_GET_LINE_CODING 0x21
#define CDC_SET_CONTROL_LINE_STATE 0x22
#define CDC_SEND_BREAK 0x23
#define CDC_SET_RINGER_PARMS 0x30
#define CDC_GET_RINGER_PARMS 0x31
#define CDC_SET_OPERATION_PARMS 0x32
#define CDC_GET_OPERATION_PARMS 0x33
#define CDC_SET_LINE_PARMS 0x34
#define CDC_GET_LINE_PARMS 0x35
#define CDC_DIAL_DIGITS 0x36
#define CDC_SET_UNIT_PARAMETER 0x37
#define CDC_GET_UNIT_PARAMETER 0x38
#define CDC_CLEAR_UNIT_PARAMETER 0x39
#define CDC_GET_PROFILE 0x3A
#define CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
#define CDC_SET_ETHERNET_PMP_FILTER 0x41
#define CDC_GET_ETHERNET_PMP_FILTER 0x42
#define CDC_SET_ETHERNET_PACKET_FILTER 0x43
#define CDC_GET_ETHERNET_STATISTIC 0x44
#define CDC_SET_ATM_DATA_FORMAT 0x50
#define CDC_GET_ATM_DEVICE_STATISTICS 0x51
#define CDC_SET_ATM_DEFAULT_VC 0x52
#define CDC_GET_ATM_VC_STATISTICS 0x53
// Communication feature selector codes
// (usbcdc11.pdf, 6.2.2..6.2.4, Table 47)
#define CDC_ABSTRACT_STATE 0x01
#define CDC_COUNTRY_SETTING 0x02
// Feature Status returned for ABSTRACT_STATE Selector
// (usbcdc11.pdf, 6.2.3, Table 48)
#define CDC_IDLE_SETTING (1 << 0)
#define CDC_DATA_MULTPLEXED_STATE (1 << 1)
// Control signal bitmap values for the SetControlLineState request
// (usbcdc11.pdf, 6.2.14, Table 51)
#define CDC_DTE_PRESENT (1 << 0)
#define CDC_ACTIVATE_CARRIER (1 << 1)
// CDC class-specific notification codes
// (usbcdc11.pdf, 6.3, Table 68)
// see Table 67 for Info about class-specific notifications
#define CDC_NOTIFICATION_NETWORK_CONNECTION 0x00
#define CDC_RESPONSE_AVAILABLE 0x01
#define CDC_AUX_JACK_HOOK_STATE 0x08
#define CDC_RING_DETECT 0x09
#define CDC_NOTIFICATION_SERIAL_STATE 0x20
#define CDC_CALL_STATE_CHANGE 0x28
#define CDC_LINE_STATE_CHANGE 0x29
#define CDC_CONNECTION_SPEED_CHANGE 0x2A
// UART state bitmap values (Serial state notification).
// (usbcdc11.pdf, 6.3.5, Table 69)
#define CDC_SERIAL_STATE_OVERRUN (1 << 6) // receive data overrun error has occurred
#define CDC_SERIAL_STATE_PARITY (1 << 5) // parity error has occurred
#define CDC_SERIAL_STATE_FRAMING (1 << 4) // framing error has occurred
#define CDC_SERIAL_STATE_RING (1 << 3) // state of ring signal detection
#define CDC_SERIAL_STATE_BREAK (1 << 2) // state of break detection
#define CDC_SERIAL_STATE_TX_CARRIER (1 << 1) // state of transmission carrier
#define CDC_SERIAL_STATE_RX_CARRIER (1 << 0) // state of receiver carrier
/*----------------------------------------------------------------------------
* Structures based on usbcdc11.pdf (www.usb.org)
*---------------------------------------------------------------------------*/
// Header functional descriptor
// (usbcdc11.pdf, 5.2.3.1)
// This header must precede any list of class-specific descriptors.
typedef struct _CDC_HEADER_DESCRIPTOR{
uint8_t bFunctionLength; // size of this descriptor in bytes
uint8_t bDescriptorType; // CS_INTERFACE descriptor type
uint8_t bDescriptorSubtype; // Header functional descriptor subtype
uint16_t bcdCDC; // USB CDC specification release version
} __attribute__((packed)) CDC_HEADER_DESCRIPTOR;
//Call management functional descriptor
// (usbcdc11.pdf, 5.2.3.2)
// Describes the processing of calls for the communication class interface.
typedef struct _CDC_CALL_MANAGEMENT_DESCRIPTOR {
uint8_t bFunctionLength; // size of this descriptor in bytes
uint8_t bDescriptorType; // CS_INTERFACE descriptor type
uint8_t bDescriptorSubtype; // call management functional descriptor subtype
uint8_t bmCapabilities; // capabilities that this configuration supports
uint8_t bDataInterface; // interface number of the data class interface used for call management (optional)
} __attribute__((packed)) CDC_CALL_MANAGEMENT_DESCRIPTOR;
// Abstract control management functional descriptor
// (usbcdc11.pdf, 5.2.3.3)
// Describes the command supported by the communication interface class with the Abstract Control Model subclass code.
typedef struct _CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR {
uint8_t bFunctionLength; // size of this descriptor in bytes
uint8_t bDescriptorType; // CS_INTERFACE descriptor type
uint8_t bDescriptorSubtype; // abstract control management functional descriptor subtype
uint8_t bmCapabilities; // capabilities supported by this configuration
} __attribute__((packed)) CDC_ABSTRACT_CONTROL_MANAGEMENT_DESCRIPTOR;
// Union functional descriptors
// (usbcdc11.pdf, 5.2.3.8)
// Describes the relationship between a group of interfaces that can be considered to form a functional unit.
typedef struct _CDC_UNION_DESCRIPTOR {
uint8_t bFunctionLength; // size of this descriptor in bytes
uint8_t bDescriptorType; // CS_INTERFACE descriptor type
uint8_t bDescriptorSubtype; // union functional descriptor subtype
uint8_t bMasterInterface; // interface number designated as master
} __attribute__((packed)) CDC_UNION_DESCRIPTOR;
// Union functional descriptors with one slave interface
// (usbcdc11.pdf, 5.2.3.8)
typedef struct _CDC_UNION_1SLAVE_DESCRIPTOR {
CDC_UNION_DESCRIPTOR sUnion; // Union functional descriptor
uint8_t bSlaveInterfaces[1]; // Slave interface 0
} __attribute__((packed)) CDC_UNION_1SLAVE_DESCRIPTOR;
// Line coding structure
// Format of the data returned when a GetLineCoding request is received
// (usbcdc11.pdf, 6.2.13)
typedef struct _CDC_LINE_CODING {
uint32_t dwDTERate; // Data terminal rate in bits per second
uint8_t bCharFormat; // Number of stop bits
uint8_t bParityType; // Parity bit type
uint8_t bDataBits; // Number of data bits
} __attribute__((packed)) CDC_LINE_CODING;
// Notification header
// Data sent on the notification endpoint must follow this header.
// see USB_SETUP_PACKET in file usb.h
typedef USB_SETUP_PACKET CDC_NOTIFICATION_HEADER;
#endif /* __CDC_H */

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: cdcuser.h
* Purpose: USB Communication Device Class User module Definitions
* Version: V1.10
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __CDCUSER_H__
#define __CDCUSER_H__
/* CDC buffer handling */
extern int CDC_RdOutBuf (char *buffer, const int *length);
extern int CDC_WrOutBuf (const char *buffer, int *length);
extern int CDC_OutBufAvailChar (int *availChar);
/* CDC Data In/Out Endpoint Address */
#define CDC_DEP_IN 0x83
#define CDC_DEP_OUT 0x03
/* CDC Communication In Endpoint Address */
#define CDC_CEP_IN 0x81
/* CDC Requests Callback Functions */
extern uint32_t CDC_SendEncapsulatedCommand (void);
extern uint32_t CDC_GetEncapsulatedResponse (void);
extern uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector);
extern uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector);
extern uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector);
extern uint32_t CDC_GetLineCoding (void);
extern uint32_t CDC_SetLineCoding (void);
extern uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap);
extern uint32_t CDC_SendBreak (unsigned short wDurationOfBreak);
/* CDC Bulk Callback Functions */
extern void CDC_BulkIn (void);
extern void CDC_BulkOut (void);
/* CDC Notification Callback Function */
extern void CDC_NotificationIn (void);
/* CDC Initializtion Function */
extern void CDC_Init (void);
/* CDC prepare the SERAIAL_STATE */
extern unsigned short CDC_GetSerialState (void);
/* flow control */
extern unsigned short CDC_DepInEmpty; // DataEndPoint IN empty
#endif /* __CDCUSER_H__ */

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/*****************************************************************************
* clkconfig.h: Header file for NXP LPC13xx Family Microprocessors
*
* Copyright(C) 2009, NXP Semiconductor
* All rights reserved.
*
* History
* 2009.08.20 ver 1.00 Preliminary version, first Release
*
******************************************************************************/
#ifndef __CLKCONFIG_H
#define __CLKCONFIG_H
#define WDTCLK_SRC_IRC_OSC 0
#define WDTCLK_SRC_MAIN_CLK 1
#define WDTCLK_SRC_WDT_OSC 2
#define CLKOUTCLK_SRC_IRC_OSC 0
#define CLKOUTCLK_SRC_SYS_OSC 1
#define CLKOUTCLK_SRC_WDT_OSC 2
#define CLKOUTCLK_SRC_MAIN_CLK 3
void WDT_CLK_Setup(uint32_t timer_num);
void CLKOUT_Setup(uint32_t timer_num);
#endif /* end __CLKCONFIG_H */
/*****************************************************************************
** End Of File
******************************************************************************/

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/*****************************************************************************
* config.h: config file for usbcdc example for NXP LPC13xx Family
* Microprocessors
*
* Copyright(C) 2008, NXP Semiconductor
* All rights reserved.
*
* History
* 2008.07.19 ver 1.00 Preliminary version, first Release
*
******************************************************************************/
/*
Overview:
This example shows how to use the USB driver to implement a CDC class USB peripheral.
To run this example, you must attach a USB cable to the board. See
the "Getting Started Guide" appendix for details.
How to use:
Click the debug toolbar button.
Click the go button.
Plug the LPCXpresso's target side into a PC using a USB cable retrofit
or a 3rd party base board.
* You should be able to see a new COM port on your PC.
*/
#define NXP_VID 0x1FC9
#define MY_VID 0x????
#define USB_VENDOR_ID NXP_VID // Vendor ID
#define USB_PROD_ID 0x0003 // Product ID
#define USB_DEVICE 0x0100 // Device ID
#define LED_PORT 0 // Port for led
#define LED_BIT 7 // Bit on port for led
/*********************************************************************************
** End Of File
*********************************************************************************/

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/*----------------------------------------------------------------------------
* Name: memory.h
* Purpose: USB Memory Storage Demo Definitions
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
/* MSC Disk Image Definitions */
#define MSC_ImageSize 6144
extern const unsigned char DiskImage[MSC_ImageSize]; /* Disk Image */

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: msc.h
* Purpose: USB Mass Storage Class Definitions
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __MSC_H__
#define __MSC_H__
/* MSC Subclass Codes */
#define MSC_SUBCLASS_RBC 0x01
#define MSC_SUBCLASS_SFF8020I_MMC2 0x02
#define MSC_SUBCLASS_QIC157 0x03
#define MSC_SUBCLASS_UFI 0x04
#define MSC_SUBCLASS_SFF8070I 0x05
#define MSC_SUBCLASS_SCSI 0x06
/* MSC Protocol Codes */
#define MSC_PROTOCOL_CBI_INT 0x00
#define MSC_PROTOCOL_CBI_NOINT 0x01
#define MSC_PROTOCOL_BULK_ONLY 0x50
/* MSC Request Codes */
#define MSC_REQUEST_RESET 0xFF
#define MSC_REQUEST_GET_MAX_LUN 0xFE
/* MSC Bulk-only Stage */
#define MSC_BS_CBW 0 /* Command Block Wrapper */
#define MSC_BS_DATA_OUT 1 /* Data Out Phase */
#define MSC_BS_DATA_IN 2 /* Data In Phase */
#define MSC_BS_DATA_IN_LAST 3 /* Data In Last Phase */
#define MSC_BS_DATA_IN_LAST_STALL 4 /* Data In Last Phase with Stall */
#define MSC_BS_CSW 5 /* Command Status Wrapper */
#define MSC_BS_ERROR 6 /* Error */
/* Bulk-only Command Block Wrapper */
typedef struct _MSC_CBW {
uint32_t dSignature;
uint32_t dTag;
uint32_t dDataLength;
uint8_t bmFlags;
uint8_t bLUN;
uint8_t bCBLength;
uint8_t CB[16];
} __attribute__((packed)) MSC_CBW;
/* Bulk-only Command Status Wrapper */
typedef struct _MSC_CSW {
uint32_t dSignature;
uint32_t dTag;
uint32_t dDataResidue;
uint8_t bStatus;
} __attribute__((packed)) MSC_CSW;
#define MSC_CBW_Signature 0x43425355
#define MSC_CSW_Signature 0x53425355
/* CSW Status Definitions */
#define CSW_CMD_PASSED 0x00
#define CSW_CMD_FAILED 0x01
#define CSW_PHASE_ERROR 0x02
/* SCSI Commands */
#define SCSI_TEST_UNIT_READY 0x00
#define SCSI_REQUEST_SENSE 0x03
#define SCSI_FORMAT_UNIT 0x04
#define SCSI_INQUIRY 0x12
#define SCSI_MODE_SELECT6 0x15
#define SCSI_MODE_SENSE6 0x1A
#define SCSI_START_STOP_UNIT 0x1B
#define SCSI_MEDIA_REMOVAL 0x1E
#define SCSI_READ_FORMAT_CAPACITIES 0x23
#define SCSI_READ_CAPACITY 0x25
#define SCSI_READ10 0x28
#define SCSI_WRITE10 0x2A
#define SCSI_VERIFY10 0x2F
#define SCSI_READ12 0xA8
#define SCSI_WRITE12 0xAA
#define SCSI_MODE_SELECT10 0x55
#define SCSI_MODE_SENSE10 0x5A
#endif /* __MSC_H__ */

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: mscuser.h
* Purpose: Mass Storage Class Custom User Definitions
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __MSCUSER_H__
#define __MSCUSER_H__
/* Mass Storage Memory Layout */
#define MSC_MemorySize 6144
#define MSC_BlockSize 512
#define MSC_BlockCount (MSC_MemorySize / MSC_BlockSize)
/* Max In/Out Packet Size */
#define MSC_MAX_PACKET 64
/* MSC In/Out Endpoint Address */
#define MSC_EP_IN 0x82
#define MSC_EP_OUT 0x02
/* MSC Requests Callback Functions */
extern uint32_t MSC_Reset (void);
extern uint32_t MSC_GetMaxLUN (void);
/* MSC Bulk Callback Functions */
extern void MSC_GetCBW (void);
extern void MSC_SetCSW (void);
extern void MSC_BulkIn (void);
extern void MSC_BulkOut(void);
#endif /* __MSCUSER_H__ */

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firmware/usbcomp_msd_cdc/inc/serial.h Normal file
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/*----------------------------------------------------------------------------
* Name: serial.h
* Purpose: serial port handling
* Version: V1.10
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
Serial interface related prototypes
*---------------------------------------------------------------------------*/
extern void ser_OpenPort (void);
extern void ser_ClosePort (void);
extern void ser_InitPort (unsigned long baudrate, unsigned int databits, unsigned int parity, unsigned int stopbits);
extern void ser_AvailChar (int *availChar);
extern int ser_Write (const char *buffer, int *length);
extern int ser_Read (char *buffer, const int *length);
extern void ser_LineState (unsigned short *lineState);

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/*****************************************************************************
* type.h: Type definition Header file for NXP Family
* Microprocessors
*
* Copyright(C) 2006, NXP Semiconductor
* All rights reserved.
*
* History
* 2009.04.01 ver 1.00 Preliminary version, first Release
*
******************************************************************************/
#ifndef __TYPE_H__
#define __TYPE_H__
// CodeRed - ifdef for GNU added to avoid potential clash with stdint.h
#if defined ( __GNUC__ )
#include <stdint.h>
#else
/* exact-width signed integer types */
typedef signed char int8_t;
typedef signed short int int16_t;
typedef signed int int32_t;
typedef signed __int64 int64_t;
/* exact-width unsigned integer types */
typedef unsigned char uint8_t;
typedef unsigned short int uint16_t;
typedef unsigned int uint32_t;
typedef unsigned __int64 uint64_t;
#endif // __GNUC__
#ifndef NULL
#define NULL ((void *)0)
#endif
#ifndef FALSE
#define FALSE (0)
#endif
#ifndef TRUE
#define TRUE (1)
#endif
#endif /* __TYPE_H__ */

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usb.h
* Purpose: USB Definitions
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __USB_H__
#define __USB_H__
typedef union {
uint16_t W;
struct {
uint8_t L;
uint8_t H;
} __attribute__((packed)) WB;
} __attribute__((packed)) WORD_BYTE;
/* bmRequestType.Dir */
#define REQUEST_HOST_TO_DEVICE 0
#define REQUEST_DEVICE_TO_HOST 1
/* bmRequestType.Type */
#define REQUEST_STANDARD 0
#define REQUEST_CLASS 1
#define REQUEST_VENDOR 2
#define REQUEST_RESERVED 3
/* bmRequestType.Recipient */
#define REQUEST_TO_DEVICE 0
#define REQUEST_TO_INTERFACE 1
#define REQUEST_TO_ENDPOINT 2
#define REQUEST_TO_OTHER 3
/* bmRequestType Definition */
typedef union _REQUEST_TYPE {
struct _BM {
uint8_t Recipient : 5;
uint8_t Type : 2;
uint8_t Dir : 1;
} __attribute__((packed)) BM;
uint8_t B;
} __attribute__((packed)) REQUEST_TYPE;
/* USB Standard Request Codes */
#define USB_REQUEST_GET_STATUS 0
#define USB_REQUEST_CLEAR_FEATURE 1
#define USB_REQUEST_SET_FEATURE 3
#define USB_REQUEST_SET_ADDRESS 5
#define USB_REQUEST_GET_DESCRIPTOR 6
#define USB_REQUEST_SET_DESCRIPTOR 7
#define USB_REQUEST_GET_CONFIGURATION 8
#define USB_REQUEST_SET_CONFIGURATION 9
#define USB_REQUEST_GET_INTERFACE 10
#define USB_REQUEST_SET_INTERFACE 11
#define USB_REQUEST_SYNC_FRAME 12
/* USB GET_STATUS Bit Values */
#define USB_GETSTATUS_SELF_POWERED 0x01
#define USB_GETSTATUS_REMOTE_WAKEUP 0x02
#define USB_GETSTATUS_ENDPOINT_STALL 0x01
/* USB Standard Feature selectors */
#define USB_FEATURE_ENDPOINT_STALL 0
#define USB_FEATURE_REMOTE_WAKEUP 1
/* USB Default Control Pipe Setup Packet */
typedef struct _USB_SETUP_PACKET {
REQUEST_TYPE bmRequestType;
uint8_t bRequest;
WORD_BYTE wValue;
WORD_BYTE wIndex;
uint16_t wLength;
} __attribute__((packed)) USB_SETUP_PACKET;
/* USB Descriptor Types */
#define USB_DEVICE_DESCRIPTOR_TYPE 1
#define USB_CONFIGURATION_DESCRIPTOR_TYPE 2
#define USB_STRING_DESCRIPTOR_TYPE 3
#define USB_INTERFACE_DESCRIPTOR_TYPE 4
#define USB_ENDPOINT_DESCRIPTOR_TYPE 5
#define USB_DEVICE_QUALIFIER_DESCRIPTOR_TYPE 6
#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_TYPE 7
#define USB_INTERFACE_POWER_DESCRIPTOR_TYPE 8
#define USB_OTG_DESCRIPTOR_TYPE 9
#define USB_DEBUG_DESCRIPTOR_TYPE 10
#define USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE 11
/* USB Device Classes */
#define USB_DEVICE_CLASS_RESERVED 0x00
#define USB_DEVICE_CLASS_AUDIO 0x01
#define USB_DEVICE_CLASS_COMMUNICATIONS 0x02
#define USB_DEVICE_CLASS_HUMAN_INTERFACE 0x03
#define USB_DEVICE_CLASS_MONITOR 0x04
#define USB_DEVICE_CLASS_PHYSICAL_INTERFACE 0x05
#define USB_DEVICE_CLASS_POWER 0x06
#define USB_DEVICE_CLASS_PRINTER 0x07
#define USB_DEVICE_CLASS_STORAGE 0x08
#define USB_DEVICE_CLASS_HUB 0x09
#define USB_DEVICE_CLASS_MISCELLANEOUS 0xEF
#define USB_DEVICE_CLASS_VENDOR_SPECIFIC 0xFF
/* bmAttributes in Configuration Descriptor */
#define USB_CONFIG_POWERED_MASK 0x40
#define USB_CONFIG_BUS_POWERED 0x80
#define USB_CONFIG_SELF_POWERED 0xC0
#define USB_CONFIG_REMOTE_WAKEUP 0x20
/* bMaxPower in Configuration Descriptor */
#define USB_CONFIG_POWER_MA(mA) ((mA)/2)
/* bEndpointAddress in Endpoint Descriptor */
#define USB_ENDPOINT_DIRECTION_MASK 0x80
#define USB_ENDPOINT_OUT(addr) ((addr) | 0x00)
#define USB_ENDPOINT_IN(addr) ((addr) | 0x80)
/* bmAttributes in Endpoint Descriptor */
#define USB_ENDPOINT_TYPE_MASK 0x03
#define USB_ENDPOINT_TYPE_CONTROL 0x00
#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01
#define USB_ENDPOINT_TYPE_BULK 0x02
#define USB_ENDPOINT_TYPE_INTERRUPT 0x03
#define USB_ENDPOINT_SYNC_MASK 0x0C
#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION 0x00
#define USB_ENDPOINT_SYNC_ASYNCHRONOUS 0x04
#define USB_ENDPOINT_SYNC_ADAPTIVE 0x08
#define USB_ENDPOINT_SYNC_SYNCHRONOUS 0x0C
#define USB_ENDPOINT_USAGE_MASK 0x30
#define USB_ENDPOINT_USAGE_DATA 0x00
#define USB_ENDPOINT_USAGE_FEEDBACK 0x10
#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK 0x20
#define USB_ENDPOINT_USAGE_RESERVED 0x30
/* USB Standard Device Descriptor */
typedef struct _USB_DEVICE_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bcdUSB;
uint8_t bDeviceClass;
uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0;
uint16_t idVendor;
uint16_t idProduct;
uint16_t bcdDevice;
uint8_t iManufacturer;
uint8_t iProduct;
uint8_t iSerialNumber;
uint8_t bNumConfigurations;
} __attribute__((packed)) USB_DEVICE_DESCRIPTOR;
/* USB 2.0 Device Qualifier Descriptor */
typedef struct _USB_DEVICE_QUALIFIER_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bcdUSB;
uint8_t bDeviceClass;
uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0;
uint8_t bNumConfigurations;
uint8_t bReserved;
} __attribute__((packed)) USB_DEVICE_QUALIFIER_DESCRIPTOR;
/* USB Standard Configuration Descriptor */
typedef struct _USB_CONFIGURATION_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t wTotalLength;
uint8_t bNumInterfaces;
uint8_t bConfigurationValue;
uint8_t iConfiguration;
uint8_t bmAttributes;
uint8_t bMaxPower;
} __attribute__((packed)) USB_CONFIGURATION_DESCRIPTOR;
/* USB Standard Interface Association Descriptor */
typedef struct _USB_INTERFACE_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bInterfaceNumber;
uint8_t bAlternateSetting;
uint8_t bNumEndpoints;
uint8_t bInterfaceClass;
uint8_t bInterfaceSubClass;
uint8_t bInterfaceProtocol;
uint8_t iInterface;
} __attribute__((packed)) USB_INTERFACE_DESCRIPTOR;
/* USB Interface Descriptor */
typedef struct _USB_INTERFACE_ASSOCIATION_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bFirstInterface;
uint8_t bInterfaceCount;
uint8_t bFunctionClass;
uint8_t bFunctionSubClass;
uint8_t bFunctionProtocol;
uint8_t iFunction;
} __attribute__((packed)) USB_INTERFACE_ASSOCIATION_DESCRIPTOR;
/* USB Standard Endpoint Descriptor */
typedef struct _USB_ENDPOINT_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bEndpointAddress;
uint8_t bmAttributes;
uint16_t wMaxPacketSize;
uint8_t bInterval;
} __attribute__((packed)) USB_ENDPOINT_DESCRIPTOR;
/* USB String Descriptor */
typedef struct _USB_STRING_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bString/*[]*/;
} __attribute__((packed)) USB_STRING_DESCRIPTOR;
/* USB Common Descriptor */
typedef struct _USB_COMMON_DESCRIPTOR {
uint8_t bLength;
uint8_t bDescriptorType;
} __attribute__((packed)) USB_COMMON_DESCRIPTOR;
#endif /* __USB_H__ */

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usbcfg.h
* Purpose: USB Custom Configuration
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------
* History:
* V1.20 Added vendor specific support
* V1.00 Initial Version
*---------------------------------------------------------------------------*/
#ifndef __USBCFG_H__
#define __USBCFG_H__
//*** <<< Use Configuration Wizard in Context Menu >>> ***
/*
// <h> USB Configuration
// <o0> USB Power
// <i> Default Power Setting
// <0=> Bus-powered
// <1=> Self-powered
// <o1> Max Number of Interfaces <1-256>
// <o2> Max Number of Endpoints <1-32>
// <o3> Max Endpoint 0 Packet Size
// <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
// <e4> DMA Transfer
// <i> Use DMA for selected Endpoints
// <o5.0> Endpoint 0 Out
// <o5.1> Endpoint 0 In
// <o5.2> Endpoint 1 Out
// <o5.3> Endpoint 1 In
// <o5.4> Endpoint 2 Out
// <o5.5> Endpoint 2 In
// <o5.6> Endpoint 3 Out
// <o5.7> Endpoint 3 In
// <o5.8> Endpoint 4 Out
// <o5.9> Endpoint 4 In
// </e>
// </h>
*/
#define USB_POWER 0
#define USB_IF_NUM 1
#define USB_LOGIC_EP_NUM 5
#define USB_EP_NUM 10
#define USB_MAX_PACKET0 64
/*
// <h> USB Event Handlers
// <h> Device Events
// <o0.0> Power Event
// <o1.0> Reset Event
// <o2.0> Suspend Event
// <o3.0> Resume Event
// <o4.0> Remote Wakeup Event
// <o5.0> Start of Frame Event
// <o6.0> Error Event
// </h>
// <h> Endpoint Events
// <o7.0> Endpoint 0 Event
// <o7.1> Endpoint 1 Event
// <o7.2> Endpoint 2 Event
// <o7.3> Endpoint 3 Event
// <o7.4> Endpoint 4 Event
// <o7.5> Endpoint 5 Event
// <o7.6> Endpoint 6 Event
// <o7.7> Endpoint 7 Event
// <o7.8> Endpoint 8 Event
// <o7.9> Endpoint 9 Event
// <o7.10> Endpoint 10 Event
// <o7.11> Endpoint 11 Event
// <o7.12> Endpoint 12 Event
// <o7.13> Endpoint 13 Event
// <o7.14> Endpoint 14 Event
// <o7.15> Endpoint 15 Event
// </h>
// <h> USB Core Events
// <o8.0> Set Configuration Event
// <o9.0> Set Interface Event
// <o10.0> Set/Clear Feature Event
// </h>
// </h>
*/
#define USB_POWER_EVENT 0
#define USB_RESET_EVENT 1
#define USB_SUSPEND_EVENT 1
#define USB_RESUME_EVENT 1
#define USB_WAKEUP_EVENT 0
#define USB_SOF_EVENT 0
#define USB_ERROR_EVENT 0
#define USB_EP_EVENT 0x000f
#define USB_CONFIGURE_EVENT 1
#define USB_INTERFACE_EVENT 0
#define USB_FEATURE_EVENT 0
/*
// <e0> USB Class Support
// <i> enables USB Class specific Requests
// <e1> Human Interface Device (HID)
// <o2> Interface Number <0-255>
// </e>
// <e3> Mass Storage
// <o4> Interface Number <0-255>
// </e>
// <e5> Audio Device
// <o6> Control Interface Number <0-255>
// <o7> Streaming Interface 1 Number <0-255>
// <o8> Streaming Interface 2 Number <0-255>
// </e>
// <e9> Communication Device
// <o10> Control Interface Number <0-255>
// <o11> Bulk Interface Number <0-255>
// <o12> Max Communication Device Buffer Size
// <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
// </e>
// </e>
*/
#define USB_CLASS 1
#define USB_HID 0
#define USB_HID_IF_NUM 0
#define USB_MSC 1
#define USB_MSC_IF_NUM 0
#define USB_AUDIO 0
#define USB_ADC_CIF_NUM 0
#define USB_ADC_SIF1_NUM 1
#define USB_ADC_SIF2_NUM 2
#define USB_CDC 1
#define USB_CDC_CIF_NUM 1
#define USB_CDC_DIF_NUM 2
#define USB_CDC_BUFSIZE 64
/*
// <e0> USB Vendor Support
// <i> enables USB Vendor specific Requests
// </e>
*/
#define USB_VENDOR 0
#endif /* __USBCFG_H__ */

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usbcore.h
* Purpose: USB Core Definitions
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __USBCORE_H__
#define __USBCORE_H__
/* USB Endpoint Data Structure */
typedef struct _USB_EP_DATA {
uint8_t *pData;
uint16_t Count;
} USB_EP_DATA;
/* USB Core Global Variables */
extern uint16_t USB_DeviceStatus;
extern uint8_t USB_DeviceAddress;
extern uint8_t USB_Configuration;
extern uint32_t USB_EndPointMask;
extern uint32_t USB_EndPointHalt;
extern uint32_t USB_EndPointStall;
extern uint8_t USB_AltSetting[USB_IF_NUM];
/* USB Endpoint 0 Buffer */
extern uint8_t EP0Buf[USB_MAX_PACKET0];
/* USB Endpoint 0 Data Info */
extern USB_EP_DATA EP0Data;
/* USB Setup Packet */
extern USB_SETUP_PACKET SetupPacket;
/* USB Core Functions */
extern void USB_ResetCore (void);
/* Newer C compilers make it really difficult to add
* an integer to a pointer */
__inline void UsbAddPtr(void **vpptr, uint32_t n);
#endif /* __USBCORE_H__ */

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firmware/usbcomp_msd_cdc/inc/usbdesc.h Normal file
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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usbdesc.h
* Purpose: USB Descriptors Definitions
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __USBDESC_H__
#define __USBDESC_H__
#define WBVAL(x) ((x) & 0xFF),(((x) >> 8) & 0xFF)
#define USB_DEVICE_DESC_SIZE (sizeof(USB_DEVICE_DESCRIPTOR))
#define USB_CONFIGUARTION_DESC_SIZE (sizeof(USB_CONFIGURATION_DESCRIPTOR))
#define USB_INTERFACE_DESC_SIZE (sizeof(USB_INTERFACE_DESCRIPTOR))
#define USB_INTERFACE_ASSOCIATION_DESC_SIZE (sizeof(USB_INTERFACE_ASSOCIATION_DESCRIPTOR))
#define USB_ENDPOINT_DESC_SIZE (sizeof(USB_ENDPOINT_DESCRIPTOR))
extern const uint8_t USB_DeviceDescriptor[];
extern const uint8_t USB_ConfigDescriptor[];
extern const uint8_t USB_StringDescriptor[];
#endif /* __USBDESC_H__ */

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firmware/usbcomp_msd_cdc/inc/usbhw.h Normal file
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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usbhw.h
* Purpose: USB Hardware Layer Definitions
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------
* History:
* V1.20 Added USB_ClearEPBuf
* V1.00 Initial Version
*----------------------------------------------------------------------------*/
#ifndef __USBHW_H__
#define __USBHW_H__
/* USB Error Codes */
#define USB_ERR_PID 0x0001 /* PID Error */
#define USB_ERR_UEPKT 0x0002 /* Unexpected Packet */
#define USB_ERR_DCRC 0x0004 /* Data CRC Error */
#define USB_ERR_TIMOUT 0x0008 /* Bus Time-out Error */
#define USB_ERR_EOP 0x0010 /* End of Packet Error */
#define USB_ERR_B_OVRN 0x0020 /* Buffer Overrun */
#define USB_ERR_BTSTF 0x0040 /* Bit Stuff Error */
#define USB_ERR_TGL 0x0080 /* Toggle Bit Error */
/* USB Hardware Functions */
extern void USBIOClkConfig (void);
extern void USB_Init (void);
extern void USB_Connect (uint32_t con);
extern void USB_Reset (void);
extern void USB_Suspend (void);
extern void USB_Resume (void);
extern void USB_WakeUp (void);
extern void USB_WakeUpCfg (uint32_t cfg);
extern void USB_SetAddress (uint32_t adr);
extern void USB_Configure (uint32_t cfg);
extern void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD);
extern void USB_DirCtrlEP (uint32_t dir);
extern void USB_EnableEP (uint32_t EPNum);
extern void USB_DisableEP (uint32_t EPNum);
extern void USB_ResetEP (uint32_t EPNum);
extern void USB_SetStallEP (uint32_t EPNum);
extern void USB_ClrStallEP (uint32_t EPNum);
extern void USB_ClearEPBuf (uint32_t EPNum);
extern uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData);
extern uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt);
extern uint32_t USB_GetFrame(void);
extern void USB_IRQHandler (void);
#endif /* __USBHW_H__ */

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firmware/usbcomp_msd_cdc/inc/usbreg.h Normal file
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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: USBREG.H
* Purpose: USB Hardware Layer Definitions for NXP LPC13xx
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#ifndef __USBREG_H
#define __USBREG_H
/* Device Interrupt Bit Definitions */
#define FRAME_INT (0x1<<0)
#define EP0_INT (0x1<<1)
#define EP1_INT (0x1<<2)
#define EP2_INT (0x1<<3)
#define EP3_INT (0x1<<4)
#define EP4_INT (0x1<<5)
#define EP5_INT (0x1<<6)
#define EP6_INT (0x1<<7)
#define EP7_INT (0x1<<8)
#define DEV_STAT_INT (0x1<<9)
#define CCEMTY_INT (0x1<<10)
#define CDFULL_INT (0x1<<11)
#define RxENDPKT_INT (0x1<<12)
#define TxENDPKT_INT (0x1<<13)
/* Rx & Tx Packet Length Definitions */
#define PKT_LNGTH_MASK 0x000003FF
#define PKT_DV 0x00000400
#define PKT_RDY 0x00000800
/* USB Control Definitions */
#define CTRL_RD_EN 0x00000001
#define CTRL_WR_EN 0x00000002
/* Command Codes */
#define CMD_SET_ADDR 0x00D00500
#define CMD_CFG_DEV 0x00D80500
#define CMD_SET_MODE 0x00F30500
#define CMD_RD_INT 0x00F40500
#define DAT_RD_INT 0x00F40200
#define CMD_RD_FRAME 0x00F50500
#define DAT_RD_FRAME 0x00F50200
#define CMD_RD_CHIP_ID 0x00FD0500
#define DAT_RD_CHIP_ID 0x00FD0200
#define CMD_SET_DEV_STAT 0x00FE0500
#define CMD_GET_DEV_STAT 0x00FE0500
#define DAT_GET_DEV_STAT 0x00FE0200
#define CMD_GET_ERR_CODE 0x00FF0500
#define DAT_GET_ERR_CODE 0x00FF0200
#define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16))
#define CMD_SEL_EP(x) (0x00000500 | ((x) << 16))
#define DAT_SEL_EP(x) (0x00000200 | ((x) << 16))
#define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
#define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
#define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
#define CMD_CLR_BUF 0x00F20500
#define CMD_VALID_BUF 0x00FA0500
/* Device Address Register Definitions */
#define DEV_ADDR_MASK 0x7F
#define DEV_EN 0x80
/* Device Configure Register Definitions */
#define CONF_DVICE 0x01
/* Device Mode Register Definitions */
#define AP_CLK 0x01
#define INAK_CI 0x02
#define INAK_CO 0x04
#define INAK_AI 0x08
#define INAK_AO 0x10
/* Device Status Register Definitions */
#define DEV_CON 0x01
#define DEV_CON_CH 0x02
#define DEV_SUS 0x04
#define DEV_SUS_CH 0x08
#define DEV_RST 0x10
/* Error Code Register Definitions */
#define ERR_EC_MASK 0x0F
#define ERR_EA 0x10
/* Error Status Register Definitions */
#define ERR_NOERROR 0x00
#define ERR_PID_ENCODE 0x01
#define ERR_UNKNOWN_PID 0x02
#define ERR_UNEXPECT_PKT 0x03
#define ERR_TCRC 0x04
#define ERR_DCRC 0x05
#define ERR_TIMEOUT 0x06
#define ERR_BABBIE 0x07
#define ERR_EOF_PKT 0x08
#define ERR_TX_RX_NAK 0x09
#define ERR_SENT_STALL 0x0A
#define ERR_BUF_OVERRUN 0x0B
#define ERR_SENT_EPT_PKT 0x0C
#define ERR_BIT_STUFF 0x0D
#define ERR_SYNC 0x0E
#define ERR_TOGGLE_BIT 0x0F
/* Endpoint Select Register Definitions */
#define EP_SEL_F 0x01
#define EP_SEL_ST 0x02
#define EP_SEL_STP 0x04
#define EP_SEL_PO 0x08
#define EP_SEL_EPN 0x10
#define EP_SEL_B_1_FULL 0x20
#define EP_SEL_B_2_FULL 0x40
/* Endpoint Status Register Definitions */
#define EP_STAT_ST 0x01
#define EP_STAT_DA 0x20
#define EP_STAT_RF_MO 0x40
#define EP_STAT_CND_ST 0x80
/* Clear Buffer Register Definitions */
#define CLR_BUF_PO 0x01
#endif /* __USBREG_H */

57
firmware/usbcomp_msd_cdc/inc/usbuser.h Normal file
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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: USBUSER.H
* Purpose: USB Custom User Definitions
* Version: V1.10
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2005-2009 Keil Software.
*---------------------------------------------------------------------------*/
#ifndef __USBUSER_H__
#define __USBUSER_H__
/* USB Device Events Callback Functions */
extern void USB_Power_Event (uint32_t power);
extern void USB_Reset_Event (void);
extern void USB_Suspend_Event (void);
extern void USB_Resume_Event (void);
extern void USB_WakeUp_Event (void);
extern void USB_SOF_Event (void);
extern void USB_Error_Event (uint32_t error);
/* USB Endpoint Callback Events */
#define USB_EVT_SETUP 1 /* Setup Packet */
#define USB_EVT_OUT 2 /* OUT Packet */
#define USB_EVT_IN 3 /* IN Packet */
#define USB_EVT_OUT_NAK 4 /* OUT Packet - Not Acknowledged */
#define USB_EVT_IN_NAK 5 /* IN Packet - Not Acknowledged */
#define USB_EVT_OUT_STALL 6 /* OUT Packet - Stalled */
#define USB_EVT_IN_STALL 7 /* IN Packet - Stalled */
/* USB Endpoint Events Callback Pointers */
extern void (* const USB_P_EP[USB_LOGIC_EP_NUM])(uint32_t event);
/* USB Endpoint Events Callback Functions */
extern void USB_EndPoint0 (uint32_t event);
extern void USB_EndPoint1 (uint32_t event);
extern void USB_EndPoint2 (uint32_t event);
extern void USB_EndPoint3 (uint32_t event);
extern void USB_EndPoint4 (uint32_t event);
/* USB Core Events Callback Functions */
extern void USB_Configure_Event (void);
extern void USB_Interface_Event (void);
extern void USB_Feature_Event (void);
#endif /* __USBUSER_H__ */

31
firmware/usbcomp_msd_cdc/inc/vcomdemo.h Normal file
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/*----------------------------------------------------------------------------
* Name: vcomdemo.h
* Purpose: USB virtual COM port Demo Definitions
* Version: V1.02
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
/* Push Button Definitions */
#define S2 0x00000400 /* P2.10 */
/* LED Definitions */
#define LED1 0x00000001 /* P2.00 */
#define LED2 0x00000002 /* P2.01 */
#define LED3 0x00000004 /* P2.02 */
#define LED4 0x00000008 /* P2.03 */
#define LED5 0x00000010 /* P2.04 */
#define LED6 0x00000020 /* P2.05 */
#define LED7 0x00000040 /* P2.06 */
#define LED8 0x00000080 /* P2.07 */
#define LEDMSK 0x000000FF /* P2.0..7 */

60
firmware/usbcomp_msd_cdc/lpc134x-vcom.inf Normal file
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[Version]
Signature="$Windows NT$"
Class=Ports
ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318}
Provider=%NXP%
;LayoutFile=layout.inf
DriverVer=01/06/07
[Manufacturer]
%NXP%=DeviceList
[DestinationDirs]
DefaultDestDir=12
[SourceDisksFiles]
[SourceDisksNames]
[DeviceList]
%DESCRIPTION%=LPC134xUSB, USB\VID_1FC9&PID_0003&MI_01
;------------------------------------------------------------------------------
; Windows 2000/XP Sections
;------------------------------------------------------------------------------
[LPC134xUSB.nt]
include=mdmcpq.inf
CopyFiles=DriverCopyFiles
AddReg=LPC134xUSB.nt.AddReg
[DriverCopyFiles]
usbser.sys,,,0x20
[LPC134xUSB.nt.AddReg]
HKR,,DevLoader,,*ntkern
HKR,,NTMPDriver,,usbser.sys
HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider"
[LPC134xUSB.nt.Services]
include=mdmcpq.inf
AddService=usbser, 0x00000002, DriverService
[LPC134xUSB.nt.HW]
include=mdmcpq.inf
[DriverService]
DisplayName=%DESCRIPTION%
ServiceType=1
StartType=3
ErrorControl=1
ServiceBinary=%12%\usbser.sys
;------------------------------------------------------------------------------
; String Definitions
;------------------------------------------------------------------------------
[Strings]
NXP="NXP - Founded by Philips"
DESCRIPTION="LPC134x USB VCom Port"

39
firmware/usbcomp_msd_cdc/readme.txt Normal file
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@ -0,0 +1,39 @@
usbcomp_msd_cdc
=====================
This project implements a USB composite class device that includes
a mass storage device and a virtual COM device.
To run this example, you must attach a USB cable to the board. See
the "Getting Started Guide" appendix for details. You may also
connect the LPCXpresso board to a base board from a 3rd party tool
partner.
When downloaded to the board and executed, the PC will first recognize
a USB mass storage device and mount a new drive that contains a text
file, and then it will recognize a USB "VCOM" device and ask for a
driver. Point windows to the .inf file in the usbcomp_msd_cdc project
directory to cause Windows to install the default USB serial driver.
At this point, you should be able to read/write files in the newly
mounted drive and send/receive characters through the USB virtual
COM port at the same time. The transmit baud rate will equal the
CDC port configured baud rate.
One thing we have seen that can cause trouble with the USB examples
is the Windows driver install. Since the example projects all use
the same USB Vendor ID and Product ID, if you try out the HID
example and then try out the CDC example, Windows may try
to use the HID driver it had already installed with the CDC
example code. To fix this, go to the Windows Device Manager,
find the broken "HID" device and select "Uninstall." Then unplug the
device and plug it back in. Windows should correctly identify the
device as being a CDC device and install the correct
driver.
The project makes use of code from the following library projects:
- CMSISv1p30_LPC13xx : for CMSIS 1.30 files relevant to LPC13xx
This library project must exist in the same workspace in order
for the project to successfully build.
For more details, read the comments in config.h

166
firmware/usbcomp_msd_cdc/src/DiskImg.c Normal file
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/* Disk Image */
#include "memory.h"
const unsigned char DiskImage[MSC_ImageSize] = {
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};

360
firmware/usbcomp_msd_cdc/src/cdcuser.c Normal file
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@ -0,0 +1,360 @@
/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: cdcuser.c
* Purpose: USB Communication Device Class User module
* Version: V1.10
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include "type.h"
#include "usb.h"
#include "usbhw.h"
#include "usbcfg.h"
#include "usbcore.h"
#include "cdc.h"
#include "cdcuser.h"
#include "serial.h"
unsigned char BulkBufIn [USB_CDC_BUFSIZE]; // Buffer to store USB IN packet
unsigned char BulkBufOut [USB_CDC_BUFSIZE]; // Buffer to store USB OUT packet
unsigned char NotificationBuf [10];
CDC_LINE_CODING CDC_LineCoding = {9600, 0, 0, 8};
unsigned short CDC_SerialState = 0x0000;
unsigned short CDC_DepInEmpty = 1; // Data IN EP is empty
/*----------------------------------------------------------------------------
We need a buffer for incomming data on USB port because USB receives
much faster than UART transmits
*---------------------------------------------------------------------------*/
/* Buffer masks */
#define CDC_BUF_SIZE (64) // Output buffer in bytes (power 2)
// large enough for file transfer
#define CDC_BUF_MASK (CDC_BUF_SIZE-1ul)
/* Buffer read / write macros */
#define CDC_BUF_RESET(cdcBuf) (cdcBuf.rdIdx = cdcBuf.wrIdx = 0)
#define CDC_BUF_WR(cdcBuf, dataIn) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.wrIdx++] = (dataIn))
#define CDC_BUF_RD(cdcBuf) (cdcBuf.data[CDC_BUF_MASK & cdcBuf.rdIdx++])
#define CDC_BUF_EMPTY(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx)
#define CDC_BUF_FULL(cdcBuf) (cdcBuf.rdIdx == cdcBuf.wrIdx+1)
#define CDC_BUF_COUNT(cdcBuf) (CDC_BUF_MASK & (cdcBuf.wrIdx - cdcBuf.rdIdx))
// CDC output buffer
typedef struct __CDC_BUF_T {
unsigned char data[CDC_BUF_SIZE];
unsigned int wrIdx;
unsigned int rdIdx;
} CDC_BUF_T;
CDC_BUF_T CDC_OutBuf; // buffer for all CDC Out data
/*----------------------------------------------------------------------------
read data from CDC_OutBuf
*---------------------------------------------------------------------------*/
int CDC_RdOutBuf (char *buffer, const int *length) {
int bytesToRead, bytesRead;
/* Read *length bytes, block if *bytes are not avaialable */
bytesToRead = *length;
bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length);
bytesRead = bytesToRead;
// ... add code to check for underrun
while (bytesToRead--) {
*buffer++ = CDC_BUF_RD(CDC_OutBuf);
}
return (bytesRead);
}
/*----------------------------------------------------------------------------
write data to CDC_OutBuf
*---------------------------------------------------------------------------*/
int CDC_WrOutBuf (const char *buffer, int *length) {
int bytesToWrite, bytesWritten;
// Write *length bytes
bytesToWrite = *length;
bytesWritten = bytesToWrite;
// ... add code to check for overwrite
while (bytesToWrite) {
CDC_BUF_WR(CDC_OutBuf, *buffer++); // Copy Data to buffer
bytesToWrite--;
}
return (bytesWritten);
}
/*----------------------------------------------------------------------------
check if character(s) are available at CDC_OutBuf
*---------------------------------------------------------------------------*/
int CDC_OutBufAvailChar (int *availChar) {
*availChar = CDC_BUF_COUNT(CDC_OutBuf);
return (0);
}
/* end Buffer handling */
/*----------------------------------------------------------------------------
CDC Initialisation
Initializes the data structures and serial port
Parameters: None
Return Value: None
*---------------------------------------------------------------------------*/
void CDC_Init (void) {
ser_OpenPort ();
ser_InitPort (CDC_LineCoding.dwDTERate,
CDC_LineCoding.bDataBits,
CDC_LineCoding.bParityType,
CDC_LineCoding.bCharFormat);
CDC_DepInEmpty = 1;
CDC_SerialState = CDC_GetSerialState();
CDC_BUF_RESET(CDC_OutBuf);
}
/*----------------------------------------------------------------------------
CDC SendEncapsulatedCommand Request Callback
Called automatically on CDC SEND_ENCAPSULATED_COMMAND Request
Parameters: None (global SetupPacket and EP0Buf)
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_SendEncapsulatedCommand (void) {
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC GetEncapsulatedResponse Request Callback
Called automatically on CDC Get_ENCAPSULATED_RESPONSE Request
Parameters: None (global SetupPacket and EP0Buf)
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_GetEncapsulatedResponse (void) {
/* ... add code to handle request */
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC SetCommFeature Request Callback
Called automatically on CDC Set_COMM_FATURE Request
Parameters: FeatureSelector
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_SetCommFeature (unsigned short wFeatureSelector) {
/* ... add code to handle request */
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC GetCommFeature Request Callback
Called automatically on CDC Get_COMM_FATURE Request
Parameters: FeatureSelector
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_GetCommFeature (unsigned short wFeatureSelector) {
/* ... add code to handle request */
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC ClearCommFeature Request Callback
Called automatically on CDC CLEAR_COMM_FATURE Request
Parameters: FeatureSelector
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_ClearCommFeature (unsigned short wFeatureSelector) {
/* ... add code to handle request */
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC SetLineCoding Request Callback
Called automatically on CDC SET_LINE_CODING Request
Parameters: none (global SetupPacket and EP0Buf)
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_SetLineCoding (void) {
CDC_LineCoding.dwDTERate = (EP0Buf[0] << 0)
| (EP0Buf[1] << 8)
| (EP0Buf[2] << 16)
| (EP0Buf[3] << 24);
CDC_LineCoding.bCharFormat = EP0Buf[4];
CDC_LineCoding.bParityType = EP0Buf[5];
CDC_LineCoding.bDataBits = EP0Buf[6];
ser_ClosePort();
ser_OpenPort ();
ser_InitPort (CDC_LineCoding.dwDTERate,
CDC_LineCoding.bDataBits,
CDC_LineCoding.bParityType,
CDC_LineCoding.bCharFormat);
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC GetLineCoding Request Callback
Called automatically on CDC GET_LINE_CODING Request
Parameters: None (global SetupPacket and EP0Buf)
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_GetLineCoding (void) {
EP0Buf[0] = (CDC_LineCoding.dwDTERate >> 0) & 0xFF;
EP0Buf[1] = (CDC_LineCoding.dwDTERate >> 8) & 0xFF;
EP0Buf[2] = (CDC_LineCoding.dwDTERate >> 16) & 0xFF;
EP0Buf[3] = (CDC_LineCoding.dwDTERate >> 24) & 0xFF;
EP0Buf[4] = CDC_LineCoding.bCharFormat;
EP0Buf[5] = CDC_LineCoding.bParityType;
EP0Buf[6] = CDC_LineCoding.bDataBits;
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC SetControlLineState Request Callback
Called automatically on CDC SET_CONTROL_LINE_STATE Request
Parameters: ControlSignalBitmap
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_SetControlLineState (unsigned short wControlSignalBitmap) {
/* ... add code to handle request */
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC SendBreak Request Callback
Called automatically on CDC Set_COMM_FATURE Request
Parameters: 0xFFFF start of Break
0x0000 stop of Break
0x#### Duration of Break
Return Value: TRUE - Success, FALSE - Error
*---------------------------------------------------------------------------*/
uint32_t CDC_SendBreak (unsigned short wDurationOfBreak) {
/* ... add code to handle request */
return (TRUE);
}
/*----------------------------------------------------------------------------
CDC_BulkIn call on DataIn Request
Parameters: none
Return Value: none
*---------------------------------------------------------------------------*/
void CDC_BulkIn(void) {
int numBytesRead, numBytesAvail;
ser_AvailChar (&numBytesAvail);
// ... add code to check for overwrite
numBytesRead = ser_Read ((char *)&BulkBufIn[0], &numBytesAvail);
// send over USB
if (numBytesRead > 0) {
USB_WriteEP (CDC_DEP_IN, &BulkBufIn[0], numBytesRead);
}
else {
CDC_DepInEmpty = 1;
}
}
/*----------------------------------------------------------------------------
CDC_BulkOut call on DataOut Request
Parameters: none
Return Value: none
*---------------------------------------------------------------------------*/
void CDC_BulkOut(void) {
int numBytesRead;
// get data from USB into intermediate buffer
numBytesRead = USB_ReadEP(CDC_DEP_OUT, &BulkBufOut[0]);
// ... add code to check for overwrite
// store data in a buffer to transmit it over serial interface
CDC_WrOutBuf ((char *)&BulkBufOut[0], &numBytesRead);
}
/*----------------------------------------------------------------------------
Get the SERIAL_STATE as defined in usbcdc11.pdf, 6.3.5, Table 69.
Parameters: none
Return Value: SerialState as defined in usbcdc11.pdf
*---------------------------------------------------------------------------*/
unsigned short CDC_GetSerialState (void) {
unsigned short temp;
CDC_SerialState = 0;
ser_LineState (&temp);
if (temp & 0x8000) CDC_SerialState |= CDC_SERIAL_STATE_RX_CARRIER;
if (temp & 0x2000) CDC_SerialState |= CDC_SERIAL_STATE_TX_CARRIER;
if (temp & 0x0010) CDC_SerialState |= CDC_SERIAL_STATE_BREAK;
if (temp & 0x4000) CDC_SerialState |= CDC_SERIAL_STATE_RING;
if (temp & 0x0008) CDC_SerialState |= CDC_SERIAL_STATE_FRAMING;
if (temp & 0x0004) CDC_SerialState |= CDC_SERIAL_STATE_PARITY;
if (temp & 0x0002) CDC_SerialState |= CDC_SERIAL_STATE_OVERRUN;
return (CDC_SerialState);
}
/*----------------------------------------------------------------------------
Send the SERIAL_STATE notification as defined in usbcdc11.pdf, 6.3.5.
*---------------------------------------------------------------------------*/
void CDC_NotificationIn (void) {
NotificationBuf[0] = 0xA1; // bmRequestType
NotificationBuf[1] = CDC_NOTIFICATION_SERIAL_STATE; // bNotification (SERIAL_STATE)
NotificationBuf[2] = 0x00; // wValue
NotificationBuf[3] = 0x00;
NotificationBuf[4] = 0x00; // wIndex (Interface #, LSB first)
NotificationBuf[5] = 0x00;
NotificationBuf[6] = 0x02; // wLength (Data length = 2 bytes, LSB first)
NotificationBuf[7] = 0x00;
NotificationBuf[8] = (CDC_SerialState >> 0) & 0xFF; // UART State Bitmap (16bits, LSB first)
NotificationBuf[9] = (CDC_SerialState >> 8) & 0xFF;
USB_WriteEP (CDC_CEP_IN, &NotificationBuf[0], 10); // send notification
}

60
firmware/usbcomp_msd_cdc/src/clkconfig.c Normal file
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@ -0,0 +1,60 @@
/******************************************************************************
* clkconfig.c: clock configuration C file for NXP LPC13xx Family
* Microprocessors
*
* Copyright(C) 2009, NXP Semiconductor
* All rights reserved.
*
* History
* 2009.08.20 ver 1.00 Preliminary version, first Release
*
******************************************************************************/
#include "LPC13xx.h"
#include "clkconfig.h"
/*****************************************************************************
** Function name: WDT_CLK_Setup
**
** Descriptions: Configure WDT clock.
** parameters: clock source: irc_osc(0), main_clk(1), wdt_osc(2).
**
** Returned value: None
**
*****************************************************************************/
void WDT_CLK_Setup ( uint32_t clksrc )
{
/* Watchdog configuration. */
/* Freq = 0.5Mhz, div_sel is 0, divided by 2. WDT_OSC should be 250khz */
LPC_SYSCON->WDTOSCCTRL = (0x1<<5)|0x00;
LPC_SYSCON->WDTCLKSEL = clksrc; /* Select clock source */
LPC_SYSCON->WDTCLKUEN = 0x01; /* Update clock */
LPC_SYSCON->WDTCLKUEN = 0x00; /* Toggle update register once */
LPC_SYSCON->WDTCLKUEN = 0x01;
while ( !(LPC_SYSCON->WDTCLKUEN & 0x01) ); /* Wait until updated */
LPC_SYSCON->WDTCLKDIV = 1; /* Divided by 1 */
LPC_SYSCON->PDRUNCFG &= ~(0x1<<6); /* Let WDT clock run */
return;
}
/*****************************************************************************
** Function name: CLKOUT_Setup
**
** Descriptions: Configure CLKOUT for reference clock check.
** parameters: clock source: irc_osc(0), sys_osc(1), wdt_osc(2),
** main_clk(3).
**
** Returned value: None
**
*****************************************************************************/
void CLKOUT_Setup ( uint32_t clksrc )
{
/* debug PLL after configuration. */
LPC_SYSCON->CLKOUTCLKSEL = clksrc; /* Select Main clock */
LPC_SYSCON->CLKOUTUEN = 0x01; /* Update clock */
LPC_SYSCON->CLKOUTUEN = 0x00; /* Toggle update register once */
LPC_SYSCON->CLKOUTUEN = 0x01;
while ( !(LPC_SYSCON->CLKOUTUEN & 0x01) ); /* Wait until updated */
LPC_SYSCON->CLKOUTDIV = 1; /* Divided by 1 */
return;
}

359
firmware/usbcomp_msd_cdc/src/cr_startup_lpc13.c Normal file
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@ -0,0 +1,359 @@
//*****************************************************************************
// +--+
// | ++----+
// +-++ |
// | |
// +-+--+ |
// | +--+--+
// +----+ Copyright (c) 2009 Code Red Technologies Ltd.
//
// Microcontroller Startup code for use with Red Suite
//
// Software License Agreement
//
// The software is owned by Code Red Technologies and/or its suppliers, and is
// protected under applicable copyright laws. All rights are reserved. Any
// use in violation of the foregoing restrictions may subject the user to criminal
// sanctions under applicable laws, as well as to civil liability for the breach
// of the terms and conditions of this license.
//
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
// CODE RED TECHNOLOGIES LTD.
//
//*****************************************************************************
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
// Code Red - if CMSIS is being used, then SystemInit() routine
// will be called by startup code rather than in application's main()
#ifdef __USE_CMSIS
#include "system_LPC13xx.h"
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void Reset_Handler(void);
void ResetISR(void) ALIAS(Reset_Handler);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void MemManage_Handler(void);
WEAK void BusFault_Handler(void);
WEAK void UsageFault_Handler(void);
WEAK void SVCall_Handler(void);
WEAK void DebugMon_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void I2C_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
void SSP_IRQHandler (void) ALIAS(IntDefaultHandler);
void UART_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
void ADC_IRQHandler (void) ALIAS(IntDefaultHandler);
void WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
void BOD_IRQHandler (void) ALIAS(IntDefaultHandler);
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT3_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT2_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
void PIOINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
void WAKEUP_IRQHandler (void) ALIAS(IntDefaultHandler);
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for redlib based applications
// main() is the entry point for newlib based applications
//
//*****************************************************************************
extern WEAK void __main(void);
extern WEAK void main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop;
//*****************************************************************************
//
// The vector table. Note that the proper constructs must be placed on this to
// ensure that it ends up at physical address 0x0000.0000.
//
//*****************************************************************************
__attribute__ ((section(".isr_vector")))
void (* const g_pfnVectors[])(void) =
{
// Core Level - CM3
(void *)&_vStackTop, // The initial stack pointer
Reset_Handler, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MPU fault handler
BusFault_Handler, // The bus fault handler
UsageFault_Handler, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
SVCall_Handler, // SVCall handler
DebugMon_Handler, // Debug monitor handler
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
// Wakeup sources (40 ea.) for the I/O pins:
// PIO0 (0:11)
// PIO1 (0:11)
// PIO2 (0:11)
// PIO3 (0:3)
WAKEUP_IRQHandler, // PIO0_0 Wakeup
WAKEUP_IRQHandler, // PIO0_1 Wakeup
WAKEUP_IRQHandler, // PIO0_2 Wakeup
WAKEUP_IRQHandler, // PIO0_3 Wakeup
WAKEUP_IRQHandler, // PIO0_4 Wakeup
WAKEUP_IRQHandler, // PIO0_5 Wakeup
WAKEUP_IRQHandler, // PIO0_6 Wakeup
WAKEUP_IRQHandler, // PIO0_7 Wakeup
WAKEUP_IRQHandler, // PIO0_8 Wakeup
WAKEUP_IRQHandler, // PIO0_9 Wakeup
WAKEUP_IRQHandler, // PIO0_10 Wakeup
WAKEUP_IRQHandler, // PIO0_11 Wakeup
WAKEUP_IRQHandler, // PIO1_0 Wakeup
WAKEUP_IRQHandler, // PIO1_1 Wakeup
WAKEUP_IRQHandler, // PIO1_2 Wakeup
WAKEUP_IRQHandler, // PIO1_3 Wakeup
WAKEUP_IRQHandler, // PIO1_4 Wakeup
WAKEUP_IRQHandler, // PIO1_5 Wakeup
WAKEUP_IRQHandler, // PIO1_6 Wakeup
WAKEUP_IRQHandler, // PIO1_7 Wakeup
WAKEUP_IRQHandler, // PIO1_8 Wakeup
WAKEUP_IRQHandler, // PIO1_9 Wakeup
WAKEUP_IRQHandler, // PIO1_10 Wakeup
WAKEUP_IRQHandler, // PIO1_11 Wakeup
WAKEUP_IRQHandler, // PIO2_0 Wakeup
WAKEUP_IRQHandler, // PIO2_1 Wakeup
WAKEUP_IRQHandler, // PIO2_2 Wakeup
WAKEUP_IRQHandler, // PIO2_3 Wakeup
WAKEUP_IRQHandler, // PIO2_4 Wakeup
WAKEUP_IRQHandler, // PIO2_5 Wakeup
WAKEUP_IRQHandler, // PIO2_6 Wakeup
WAKEUP_IRQHandler, // PIO2_7 Wakeup
WAKEUP_IRQHandler, // PIO2_8 Wakeup
WAKEUP_IRQHandler, // PIO2_9 Wakeup
WAKEUP_IRQHandler, // PIO2_10 Wakeup
WAKEUP_IRQHandler, // PIO2_11 Wakeup
WAKEUP_IRQHandler, // PIO3_0 Wakeup
WAKEUP_IRQHandler, // PIO3_1 Wakeup
WAKEUP_IRQHandler, // PIO3_2 Wakeup
WAKEUP_IRQHandler, // PIO3_3 Wakeup
I2C_IRQHandler, // I2C0
TIMER16_0_IRQHandler, // CT16B0 (16-bit Timer 0)
TIMER16_1_IRQHandler, // CT16B1 (16-bit Timer 1)
TIMER32_0_IRQHandler, // CT32B0 (32-bit Timer 0)
TIMER32_1_IRQHandler, // CT32B1 (32-bit Timer 1)
SSP_IRQHandler, // SSP0
UART_IRQHandler, // UART0
USB_IRQHandler, // USB IRQ
USB_FIQHandler, // USB FIQ
ADC_IRQHandler, // ADC (A/D Converter)
WDT_IRQHandler, // WDT (Watchdog Timer)
BOD_IRQHandler, // BOD (Brownout Detect)
FMC_IRQHandler, // Flash (IP2111 Flash Memory Controller)
PIOINT3_IRQHandler, // PIO INT3
PIOINT2_IRQHandler, // PIO INT2
PIOINT1_IRQHandler, // PIO INT1
PIOINT0_IRQHandler, // PIO INT0
};
//*****************************************************************************
//
// The following are constructs created by the linker, indicating where the
// the "data" and "bss" segments reside in memory. The initializers for the
// for the "data" segment resides immediately following the "text" segment.
//
//*****************************************************************************
extern unsigned long _etext;
extern unsigned long _data;
extern unsigned long _edata;
extern unsigned long _bss;
extern unsigned long _ebss;
//*****************************************************************************
//
// This is the code that gets called when the processor first starts execution
// following a reset event. Only the absolutely necessary set is performed,
// after which the application supplied entry() routine is called. Any fancy
// actions (such as making decisions based on the reset cause register, and
// resetting the bits in that register) are left solely in the hands of the
// application.
//
//*****************************************************************************
void
//ResetISR(void)
Reset_Handler(void)
{
unsigned long *pulSrc, *pulDest;
//
// Copy the data segment initializers from flash to SRAM.
//
pulSrc = &_etext;
for(pulDest = &_data; pulDest < &_edata; )
{
*pulDest++ = *pulSrc++;
}
//
// Zero fill the bss segment. This is done with inline assembly since this
// will clear the value of pulDest if it is not kept in a register.
//
__asm(" ldr r0, =_bss\n"
" ldr r1, =_ebss\n"
" mov r2, #0\n"
" .thumb_func\n"
"zero_loop:\n"
" cmp r0, r1\n"
" it lt\n"
" strlt r2, [r0], #4\n"
" blt zero_loop");
#ifdef __USE_CMSIS
SystemInit();
#endif
//
// Call the application's entry point.
// __main() is the entry point for redlib based applications (which calls main())
// main() is the entry point for newlib based applications
//
if (__main)
__main() ;
else
main() ;
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
// simply enters an infinite loop, preserving the system state for examination
// by a debugger.
//
//*****************************************************************************
void NMI_Handler(void)
{
while(1)
{
}
}
void HardFault_Handler(void)
{
while(1)
{
}
}
void MemManage_Handler(void)
{
while(1)
{
}
}
void BusFault_Handler(void)
{
while(1)
{
}
}
void UsageFault_Handler(void)
{
while(1)
{
}
}
void SVCall_Handler(void)
{
while(1)
{
}
}
void DebugMon_Handler(void)
{
while(1)
{
}
}
void PendSV_Handler(void)
{
while(1)
{
}
}
void SysTick_Handler(void)
{
while(1)
{
}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a handler
// is not present in the application code.
//
//*****************************************************************************
static void IntDefaultHandler(void)
{
//
// Go into an infinite loop.
//
while(1)
{
}
}

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firmware/usbcomp_msd_cdc/src/edubrm.c Normal file
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#include "LPC13xx.h"
#include "type.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "cdc.h"
#include "cdcuser.h"
#include "serial.h"
#include "vcomdemo.h"
#include "mscuser.h"
#include "memory.h"
#include "stdio.h"
#include "string.h"
#include "edubrm.h"
#define mainLED_BIT ( 7 )
void VCOM_Brm2Usb(void) {
/*
static char serBuf [USB_CDC_BUFSIZE];
int numBytesRead, numAvailByte;
serBuf[0] = 'A';
numBytesRead = 1;
/* ser_AvailChar (&numAvailByte);
if (numAvailByte > 0) {
if (CDC_DepInEmpty) {
numBytesRead = ser_Read (&serBuf[0], &numAvailByte);
CDC_DepInEmpty = 0;
USB_WriteEP (CDC_DEP_IN, (unsigned char *)&serBuf[0], numBytesRead);
}
/*
}
*/
}
static char cmdInbuffer[256];
int cmdInbufferIndex = 0;
int checkForCommand(void) {
int i=0;
for (i=0;i<cmdInbufferIndex;i++) {
if (cmdInbuffer[i] == '\n' ) {
return i;
}
}
return 0;
}
static unsigned long ulLEDState = 1;
void enableLED() {
LPC_GPIO0->DIR |= ( 0x1 << mainLED_BIT );
}
void disableLED() {
LPC_GPIO0->DIR |= ( 0x0 << mainLED_BIT );
}
void toggleLED( ){
ulLEDState = !ulLEDState;
LPC_GPIO0->MASKED_ACCESS[ ( 1 << mainLED_BIT) ] = ( ulLEDState << mainLED_BIT );
}
void sendToUSB(char *string) {
USB_WriteEP (CDC_DEP_IN, string, strlen(string));
}
void commandReceived(char * receivedCommand) {
if (strcmp("PING", receivedCommand) == 0) {
//echo back
sendToUSB("PONG\n");
toggleLED();
} else if (strcmp("VERSION", receivedCommand) == 0) {
char verstr[32];
sprintf(verstr, "%s\n", VERSION);
toggleLED();
}
}
void VCOM_Usb2Brm(void) {
static char serBuf [32];
int numBytesToRead, numBytesRead, numAvailByte;
int i=0;
static char receivedCommand[128];
CDC_OutBufAvailChar (&numAvailByte);
if (numAvailByte > 0) {
numBytesToRead = numAvailByte > 32 ? 32 : numAvailByte;
numBytesRead = CDC_RdOutBuf (&serBuf[0], &numBytesToRead);
for (i=0;i<numBytesRead;i++) { //TODO: replace with memcpy
cmdInbuffer[cmdInbufferIndex++] = serBuf[i];
}
int command = checkForCommand();
if (command != 0) {
//there is some command
cmdInbufferIndex = 0;
memset(receivedCommand,sizeof(receivedCommand), 0);
memcpy(receivedCommand, (unsigned char *)&cmdInbuffer[0], command);
//USB_WriteEP (CDC_DEP_IN, (unsigned char *)&cmdInbuffer[0], command);
commandReceived(receivedCommand);
}
}
}

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firmware/usbcomp_msd_cdc/src/edubrm.h Normal file
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#ifndef EDUBRM_H
#define EDUBRM_H
#define VERSION "0.0000001 pre-alpha"
#endif

708
firmware/usbcomp_msd_cdc/src/mscuser.c Normal file
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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: mscuser.c
* Purpose: Mass Storage Class Custom User Module
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------
* History:
* V1.20 Added SCSI_READ12, SCSI_WRITE12
* V1.00 Initial Version
*---------------------------------------------------------------------------*/
#include "type.h"
#include "usb.h"
#include "msc.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "mscuser.h"
#include "memory.h"
uint8_t Memory[MSC_MemorySize]; /* MSC RAM */
uint32_t MemOK; /* Memory OK */
uint32_t Offset; /* R/W Offset */
uint32_t Length; /* R/W Length */
uint8_t BulkStage = MSC_BS_CBW; /* Bulk Stage */
uint8_t BulkBuf[MSC_MAX_PACKET] __attribute__ ((aligned (4))); /* Bulk In/Out Buffer */
uint8_t BulkLen; /* Bulk In/Out Length */
MSC_CBW CBW; /* Command Block Wrapper */
MSC_CSW CSW; /* Command Status Wrapper */
/*
* Set Stall for MSC Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void MSC_SetStallEP (uint32_t EPNum) { /* set EP halt status according stall status */
USB_SetStallEP(EPNum);
USB_EndPointHalt |= (EPNum & 0x80) ? ((1 << 16) << (EPNum & 0x0F)) : (1 << EPNum);
}
/*
* MSC Mass Storage Reset Request Callback
* Called automatically on Mass Storage Reset Request
* Parameters: None (global SetupPacket and EP0Buf)
* Return Value: TRUE - Success, FALSE - Error
*/
uint32_t MSC_Reset (void) {
USB_EndPointStall = 0x00000000; /* EP must stay stalled */
CSW.dSignature = 0; /* invalid signature */
BulkStage = MSC_BS_CBW;
return (TRUE);
}
/*
* MSC Get Max LUN Request Callback
* Called automatically on Get Max LUN Request
* Parameters: None (global SetupPacket and EP0Buf)
* Return Value: TRUE - Success, FALSE - Error
*/
uint32_t MSC_GetMaxLUN (void) {
EP0Buf[0] = 0; /* No LUN associated with this device */
return (TRUE);
}
/*
* MSC Memory Read Callback
* Called automatically on Memory Read Event
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_MemoryRead (void) {
uint32_t n;
if (Length > MSC_MAX_PACKET) {
n = MSC_MAX_PACKET;
} else {
n = Length;
}
if ((Offset + n) > MSC_MemorySize) {
n = MSC_MemorySize - Offset;
BulkStage = MSC_BS_DATA_IN_LAST_STALL;
}
USB_WriteEP(MSC_EP_IN, &Memory[Offset], n);
Offset += n;
Length -= n;
CSW.dDataResidue -= n;
if (Length == 0) {
BulkStage = MSC_BS_DATA_IN_LAST;
}
if (BulkStage != MSC_BS_DATA_IN) {
CSW.bStatus = CSW_CMD_PASSED;
}
}
/*
* MSC Memory Write Callback
* Called automatically on Memory Write Event
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_MemoryWrite (void) {
uint32_t n;
if ((Offset + BulkLen) > MSC_MemorySize) {
BulkLen = MSC_MemorySize - Offset;
BulkStage = MSC_BS_CSW;
MSC_SetStallEP(MSC_EP_OUT);
}
for (n = 0; n < BulkLen; n++) {
Memory[Offset + n] = BulkBuf[n];
}
Offset += BulkLen;
Length -= BulkLen;
CSW.dDataResidue -= BulkLen;
if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
CSW.bStatus = CSW_CMD_PASSED;
MSC_SetCSW();
}
}
/*
* MSC Memory Verify Callback
* Called automatically on Memory Verify Event
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_MemoryVerify (void) {
uint32_t n;
if ((Offset + BulkLen) > MSC_MemorySize) {
BulkLen = MSC_MemorySize - Offset;
BulkStage = MSC_BS_CSW;
MSC_SetStallEP(MSC_EP_OUT);
}
for (n = 0; n < BulkLen; n++) {
if (Memory[Offset + n] != BulkBuf[n]) {
MemOK = FALSE;
break;
}
}
Offset += BulkLen;
Length -= BulkLen;
CSW.dDataResidue -= BulkLen;
if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
CSW.bStatus = (MemOK) ? CSW_CMD_PASSED : CSW_CMD_FAILED;
MSC_SetCSW();
}
}
/*
* MSC SCSI Read/Write Setup Callback
* Parameters: None (global variables)
* Return Value: TRUE - Success, FALSE - Error
*/
uint32_t MSC_RWSetup (void) {
uint32_t n;
/* Logical Block Address of First Block */
n = (CBW.CB[2] << 24) |
(CBW.CB[3] << 16) |
(CBW.CB[4] << 8) |
(CBW.CB[5] << 0);
Offset = n * MSC_BlockSize;
/* Number of Blocks to transfer */
switch (CBW.CB[0]) {
case SCSI_READ10:
case SCSI_WRITE10:
case SCSI_VERIFY10:
n = (CBW.CB[7] << 8) |
(CBW.CB[8] << 0);
break;
case SCSI_READ12:
case SCSI_WRITE12:
n = (CBW.CB[6] << 24) |
(CBW.CB[7] << 16) |
(CBW.CB[8] << 8) |
(CBW.CB[9] << 0);
break;
}
Length = n * MSC_BlockSize;
if (CBW.dDataLength == 0) { /* host requests no data */
CSW.bStatus = CSW_CMD_FAILED;
MSC_SetCSW();
return (FALSE);
}
if (CBW.dDataLength != Length) {
if ((CBW.bmFlags & 0x80) != 0) { /* stall appropriate EP */
MSC_SetStallEP(MSC_EP_IN);
} else {
MSC_SetStallEP(MSC_EP_OUT);
}
CSW.bStatus = CSW_CMD_FAILED;
MSC_SetCSW();
return (FALSE);
}
return (TRUE);
}
/*
* Check Data IN Format
* Parameters: None (global variables)
* Return Value: TRUE - Success, FALSE - Error
*/
uint32_t DataInFormat (void) {
if (CBW.dDataLength == 0) {
CSW.bStatus = CSW_PHASE_ERROR;
MSC_SetCSW();
return (FALSE);
}
if ((CBW.bmFlags & 0x80) == 0) {
MSC_SetStallEP(MSC_EP_OUT);
CSW.bStatus = CSW_PHASE_ERROR;
MSC_SetCSW();
return (FALSE);
}
return (TRUE);
}
/*
* Perform Data IN Transfer
* Parameters: None (global variables)
* Return Value: TRUE - Success, FALSE - Error
*/
void DataInTransfer (void) {
if (BulkLen >= CBW.dDataLength)
BulkLen = CBW.dDataLength;
BulkStage = MSC_BS_DATA_IN_LAST;
USB_WriteEP(MSC_EP_IN, BulkBuf, BulkLen);
CSW.dDataResidue -= BulkLen;
CSW.bStatus = CSW_CMD_PASSED;
}
/*
* MSC SCSI Test Unit Ready Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_TestUnitReady (void) {
if (CBW.dDataLength != 0) {
if ((CBW.bmFlags & 0x80) != 0) {
MSC_SetStallEP(MSC_EP_IN);
} else {
MSC_SetStallEP(MSC_EP_OUT);
}
}
CSW.bStatus = CSW_CMD_PASSED;
MSC_SetCSW();
}
/*
* MSC SCSI Request Sense Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_RequestSense (void) {
if (!DataInFormat()) return;
BulkBuf[ 0] = 0x70; /* Response Code */
BulkBuf[ 1] = 0x00;
BulkBuf[ 2] = 0x02; /* Sense Key */
BulkBuf[ 3] = 0x00;
BulkBuf[ 4] = 0x00;
BulkBuf[ 5] = 0x00;
BulkBuf[ 6] = 0x00;
BulkBuf[ 7] = 0x0A; /* Additional Length */
BulkBuf[ 8] = 0x00;
BulkBuf[ 9] = 0x00;
BulkBuf[10] = 0x00;
BulkBuf[11] = 0x00;
BulkBuf[12] = 0x30; /* ASC */
BulkBuf[13] = 0x01; /* ASCQ */
BulkBuf[14] = 0x00;
BulkBuf[15] = 0x00;
BulkBuf[16] = 0x00;
BulkBuf[17] = 0x00;
BulkLen = 18;
DataInTransfer();
}
/*
* MSC SCSI Inquiry Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_Inquiry (void) {
if (!DataInFormat()) return;
BulkBuf[ 0] = 0x00; /* Direct Access Device */
BulkBuf[ 1] = 0x80; /* RMB = 1: Removable Medium */
BulkBuf[ 2] = 0x00; /* Version: No conformance claim to standard */
BulkBuf[ 3] = 0x01;
BulkBuf[ 4] = 36-4; /* Additional Length */
BulkBuf[ 5] = 0x80; /* SCCS = 1: Storage Controller Component */
BulkBuf[ 6] = 0x00;
BulkBuf[ 7] = 0x00;
BulkBuf[ 8] = 'K'; /* Vendor Identification */
BulkBuf[ 9] = 'e';
BulkBuf[10] = 'i';
BulkBuf[11] = 'l';
BulkBuf[12] = ' ';
BulkBuf[13] = ' ';
BulkBuf[14] = ' ';
BulkBuf[15] = ' ';
BulkBuf[16] = 'L'; /* Product Identification */
BulkBuf[17] = 'P';
BulkBuf[18] = 'C';
BulkBuf[19] = '1';
BulkBuf[20] = '3';
BulkBuf[21] = '4';
BulkBuf[22] = 'x';
BulkBuf[23] = ' ';
BulkBuf[24] = 'D';
BulkBuf[25] = 'i';
BulkBuf[26] = 's';
BulkBuf[27] = 'k';
BulkBuf[28] = ' ';
BulkBuf[29] = ' ';
BulkBuf[30] = ' ';
BulkBuf[31] = ' ';
BulkBuf[32] = '1'; /* Product Revision Level */
BulkBuf[33] = '.';
BulkBuf[34] = '0';
BulkBuf[35] = ' ';
BulkLen = 36;
DataInTransfer();
}
/*
* MSC SCSI Mode Sense (6-Byte) Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_ModeSense6 (void) {
if (!DataInFormat()) return;
BulkBuf[ 0] = 0x03;
BulkBuf[ 1] = 0x00;
BulkBuf[ 2] = 0x00;
BulkBuf[ 3] = 0x00;
BulkLen = 4;
DataInTransfer();
}
/*
* MSC SCSI Mode Sense (10-Byte) Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_ModeSense10 (void) {
if (!DataInFormat()) return;
BulkBuf[ 0] = 0x00;
BulkBuf[ 1] = 0x06;
BulkBuf[ 2] = 0x00;
BulkBuf[ 3] = 0x00;
BulkBuf[ 4] = 0x00;
BulkBuf[ 5] = 0x00;
BulkBuf[ 6] = 0x00;
BulkBuf[ 7] = 0x00;
BulkLen = 8;
DataInTransfer();
}
/*
* MSC SCSI Read Capacity Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_ReadCapacity (void) {
if (!DataInFormat()) return;
/* Last Logical Block */
BulkBuf[ 0] = ((MSC_BlockCount - 1) >> 24) & 0xFF;
BulkBuf[ 1] = ((MSC_BlockCount - 1) >> 16) & 0xFF;
BulkBuf[ 2] = ((MSC_BlockCount - 1) >> 8) & 0xFF;
BulkBuf[ 3] = ((MSC_BlockCount - 1) >> 0) & 0xFF;
/* Block Length */
BulkBuf[ 4] = (MSC_BlockSize >> 24) & 0xFF;
BulkBuf[ 5] = (MSC_BlockSize >> 16) & 0xFF;
BulkBuf[ 6] = (MSC_BlockSize >> 8) & 0xFF;
BulkBuf[ 7] = (MSC_BlockSize >> 0) & 0xFF;
BulkLen = 8;
DataInTransfer();
}
/*
* MSC SCSI Read Format Capacity Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_ReadFormatCapacity (void) {
if (!DataInFormat()) return;
BulkBuf[ 0] = 0x00;
BulkBuf[ 1] = 0x00;
BulkBuf[ 2] = 0x00;
BulkBuf[ 3] = 0x08; /* Capacity List Length */
/* Block Count */
BulkBuf[ 4] = (MSC_BlockCount >> 24) & 0xFF;
BulkBuf[ 5] = (MSC_BlockCount >> 16) & 0xFF;
BulkBuf[ 6] = (MSC_BlockCount >> 8) & 0xFF;
BulkBuf[ 7] = (MSC_BlockCount >> 0) & 0xFF;
/* Block Length */
BulkBuf[ 8] = 0x02; /* Descriptor Code: Formatted Media */
BulkBuf[ 9] = (MSC_BlockSize >> 16) & 0xFF;
BulkBuf[10] = (MSC_BlockSize >> 8) & 0xFF;
BulkBuf[11] = (MSC_BlockSize >> 0) & 0xFF;
BulkLen = 12;
DataInTransfer();
}
/*
* MSC Get Command Block Wrapper Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_GetCBW (void) {
uint32_t n;
for (n = 0; n < BulkLen; n++) {
*((uint8_t *)&CBW + n) = BulkBuf[n];
}
if ((BulkLen == sizeof(CBW)) && (CBW.dSignature == MSC_CBW_Signature)) {
/* Valid CBW */
CSW.dTag = CBW.dTag;
CSW.dDataResidue = CBW.dDataLength;
if ((CBW.bLUN != 0) ||
(CBW.bCBLength < 1) ||
(CBW.bCBLength > 16) ) {
fail:
CSW.bStatus = CSW_CMD_FAILED;
MSC_SetCSW();
} else {
switch (CBW.CB[0]) {
case SCSI_TEST_UNIT_READY:
MSC_TestUnitReady();
break;
case SCSI_REQUEST_SENSE:
MSC_RequestSense();
break;
case SCSI_FORMAT_UNIT:
goto fail;
case SCSI_INQUIRY:
MSC_Inquiry();
break;
case SCSI_START_STOP_UNIT:
goto fail;
case SCSI_MEDIA_REMOVAL:
goto fail;
case SCSI_MODE_SELECT6:
goto fail;
case SCSI_MODE_SENSE6:
MSC_ModeSense6();
break;
case SCSI_MODE_SELECT10:
goto fail;
case SCSI_MODE_SENSE10:
MSC_ModeSense10();
break;
case SCSI_READ_FORMAT_CAPACITIES:
MSC_ReadFormatCapacity();
break;
case SCSI_READ_CAPACITY:
MSC_ReadCapacity();
break;
case SCSI_READ10:
case SCSI_READ12:
if (MSC_RWSetup()) {
if ((CBW.bmFlags & 0x80) != 0) {
BulkStage = MSC_BS_DATA_IN;
MSC_MemoryRead();
} else { /* direction mismatch */
MSC_SetStallEP(MSC_EP_OUT);
CSW.bStatus = CSW_PHASE_ERROR;
MSC_SetCSW();
}
}
break;
case SCSI_WRITE10:
case SCSI_WRITE12:
if (MSC_RWSetup()) {
if ((CBW.bmFlags & 0x80) == 0) {
BulkStage = MSC_BS_DATA_OUT;
} else { /* direction mismatch */
MSC_SetStallEP(MSC_EP_IN);
CSW.bStatus = CSW_PHASE_ERROR;
MSC_SetCSW();
}
}
break;
case SCSI_VERIFY10:
if ((CBW.CB[1] & 0x02) == 0) {
// BYTCHK = 0 -> CRC Check (not implemented)
CSW.bStatus = CSW_CMD_PASSED;
MSC_SetCSW();
break;
}
if (MSC_RWSetup()) {
if ((CBW.bmFlags & 0x80) == 0) {
BulkStage = MSC_BS_DATA_OUT;
MemOK = TRUE;
} else {
MSC_SetStallEP(MSC_EP_IN);
CSW.bStatus = CSW_PHASE_ERROR;
MSC_SetCSW();
}
}
break;
default:
goto fail;
}
}
} else {
/* Invalid CBW */
MSC_SetStallEP(MSC_EP_IN);
/* set EP to stay stalled */
USB_EndPointStall |= (MSC_EP_IN & 0x80) ? ((1 << 16) << (MSC_EP_IN & 0x0F)) : (1 << MSC_EP_IN);
MSC_SetStallEP(MSC_EP_OUT);
/* set EP to stay stalled */
USB_EndPointStall |= (MSC_EP_OUT & 0x80) ? ((1 << 16) << (MSC_EP_OUT & 0x0F)) : (1 << MSC_EP_OUT);
BulkStage = MSC_BS_ERROR;
}
}
/*
* MSC Set Command Status Wrapper Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_SetCSW (void) {
CSW.dSignature = MSC_CSW_Signature;
USB_WriteEP(MSC_EP_IN, (uint8_t *)&CSW, sizeof(CSW));
BulkStage = MSC_BS_CSW;
}
/*
* MSC Bulk In Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_BulkIn (void) {
switch (BulkStage) {
case MSC_BS_DATA_IN:
switch (CBW.CB[0]) {
case SCSI_READ10:
case SCSI_READ12:
MSC_MemoryRead();
break;
}
break;
case MSC_BS_DATA_IN_LAST:
MSC_SetCSW();
break;
case MSC_BS_DATA_IN_LAST_STALL:
MSC_SetStallEP(MSC_EP_IN);
MSC_SetCSW();
break;
case MSC_BS_CSW:
BulkStage = MSC_BS_CBW;
break;
}
}
/*
* MSC Bulk Out Callback
* Parameters: None (global variables)
* Return Value: None
*/
void MSC_BulkOut (void) {
BulkLen = USB_ReadEP(MSC_EP_OUT, BulkBuf);
switch (BulkStage) {
case MSC_BS_CBW:
MSC_GetCBW();
break;
case MSC_BS_DATA_OUT:
switch (CBW.CB[0]) {
case SCSI_WRITE10:
case SCSI_WRITE12:
MSC_MemoryWrite();
break;
case SCSI_VERIFY10:
MSC_MemoryVerify();
break;
}
break;
default:
MSC_SetStallEP(MSC_EP_OUT);
CSW.bStatus = CSW_PHASE_ERROR;
MSC_SetCSW();
break;
}
}

243
firmware/usbcomp_msd_cdc/src/serial.c Normal file
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/*----------------------------------------------------------------------------
* Name: serial.c
* Purpose: serial port handling for LPC134x
* Version: V1.10
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include "LPC13xx.h" // LPC13xx definitions
#include "type.h"
#include "serial.h"
/*----------------------------------------------------------------------------
Defines for ring buffers
*---------------------------------------------------------------------------*/
#define SER_BUF_SIZE (128) // serial buffer in bytes (power 2)
#define SER_BUF_MASK (SER_BUF_SIZE-1ul) // buffer size mask
/* Buffer read / write macros */
#define SER_BUF_RESET(serBuf) (serBuf.rdIdx = serBuf.wrIdx = 0)
#define SER_BUF_WR(serBuf, dataIn) (serBuf.data[SER_BUF_MASK & serBuf.wrIdx++] = (dataIn))
#define SER_BUF_RD(serBuf) (serBuf.data[SER_BUF_MASK & serBuf.rdIdx++])
#define SER_BUF_EMPTY(serBuf) (serBuf.rdIdx == serBuf.wrIdx)
#define SER_BUF_FULL(serBuf) (serBuf.rdIdx == serBuf.wrIdx+1)
#define SER_BUF_COUNT(serBuf) (SER_BUF_MASK & (serBuf.wrIdx - serBuf.rdIdx))
// buffer type
typedef struct __SER_BUF_T {
unsigned char data[SER_BUF_SIZE];
unsigned int wrIdx;
unsigned int rdIdx;
} SER_BUF_T;
unsigned long ser_txRestart; // NZ if TX restart is required
unsigned short ser_lineState; // ((msr << 8) | (lsr))
SER_BUF_T ser_out; // Serial data buffers
SER_BUF_T ser_in;
/*----------------------------------------------------------------------------
open the serial port
*---------------------------------------------------------------------------*/
void ser_OpenPort (void) {
NVIC_DisableIRQ(UART_IRQn);
LPC_IOCON->PIO1_6 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO1_6 |= 0x01; /* UART RXD */
LPC_IOCON->PIO1_7 &= ~0x07;
LPC_IOCON->PIO1_7 |= 0x01; /* UART TXD */
/* Enable UART clock */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
return;
}
/*----------------------------------------------------------------------------
close the serial port
*---------------------------------------------------------------------------*/
void ser_ClosePort (void) {
LPC_IOCON->PIO1_6 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO1_7 &= ~0x07;
/* Disable the interrupt in the VIC and UART controllers */
LPC_UART->IER = 0;
NVIC_DisableIRQ(UART_IRQn);
return;
}
/*----------------------------------------------------------------------------
initialize the serial port
*---------------------------------------------------------------------------*/
void ser_InitPort (unsigned long baudrate, unsigned int databits,
unsigned int parity, unsigned int stopbits) {
uint8_t lcr_p, lcr_s, lcr_d;
uint32_t dll;
uint32_t Fdiv;
switch (databits) {
case 5: // 5 Data bits
lcr_d = 0x00;
break;
case 6: // 6 Data bits
lcr_d = 0x01;
break;
case 7: // 7 Data bits
lcr_d = 0x02;
break;
case 8: // 8 Data bits
default:
lcr_d = 0x03;
break;
}
switch (stopbits) {
case 1: // 1,5 Stop bits
case 2: // 2 Stop bits
lcr_s = 0x04;
break;
case 0: // 1 Stop bit
default:
lcr_s = 0x00;
break;
}
switch (parity) {
case 1: // Parity Odd
lcr_p = 0x08;
break;
case 2: // Parity Even
lcr_p = 0x18;
break;
case 3: // Parity Mark
lcr_p = 0x28;
break;
case 4: // Parity Space
lcr_p = 0x38;
break;
case 0: // Parity None
default:
lcr_p = 0x00;
break;
}
SER_BUF_RESET(ser_out); // reset out buffer
SER_BUF_RESET(ser_in); // reset in buffer
/* Note that the pclk is 24,0 MHz. (48.0 MHz / 2) */
/* 24 MHz PCLK generates also rates for 115200, 57600 baud */
Fdiv = LPC_SYSCON->UARTCLKDIV;
dll = (((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/Fdiv)/16)/baudrate ; /*baud rate */
LPC_UART->FDR = 0; // Fractional divider not used
LPC_UART->LCR = 0x80 | lcr_d | lcr_p | lcr_s; // Data bits, Parity, Stop bit
LPC_UART->DLL = dll; // Baud Rate depending on PCLK
LPC_UART->DLM = (dll >> 8); // High divisor latch
LPC_UART->LCR = 0x00 | lcr_d | lcr_p | lcr_s; // DLAB = 0
LPC_UART->IER = 0x03; // Enable TX/RX interrupts
LPC_UART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
ser_txRestart = 1; // TX fifo is empty
/* Enable the UART Interrupt */
NVIC_EnableIRQ(UART_IRQn);
return;
}
/*----------------------------------------------------------------------------
read data from serial port
*---------------------------------------------------------------------------*/
int ser_Read (char *buffer, const int *length) {
int bytesToRead, bytesRead;
/* Read *length bytes, block if *bytes are not avaialable */
bytesToRead = *length;
bytesToRead = (bytesToRead < (*length)) ? bytesToRead : (*length);
bytesRead = bytesToRead;
while (bytesToRead--) {
while (SER_BUF_EMPTY(ser_in)); // Block until data is available if none
*buffer++ = SER_BUF_RD(ser_in);
}
return (bytesRead);
}
/*----------------------------------------------------------------------------
write data to the serial port
*---------------------------------------------------------------------------*/
int ser_Write (const char *buffer, int *length) {
int bytesToWrite, bytesWritten;
// Write *length bytes
bytesToWrite = *length;
bytesWritten = bytesToWrite;
while (!SER_BUF_EMPTY(ser_out)); // Block until space is available if none
while (bytesToWrite) {
SER_BUF_WR(ser_out, *buffer++); // Read Rx FIFO to buffer
bytesToWrite--;
}
if (ser_txRestart) {
ser_txRestart = 0;
LPC_UART->THR = SER_BUF_RD(ser_out); // Write to the Tx Register
}
return (bytesWritten);
}
/*----------------------------------------------------------------------------
check if character(s) are available at the serial interface
*---------------------------------------------------------------------------*/
void ser_AvailChar (int *availChar) {
*availChar = SER_BUF_COUNT(ser_in);
}
/*----------------------------------------------------------------------------
read the line state of the serial port
*---------------------------------------------------------------------------*/
void ser_LineState (unsigned short *lineState) {
*lineState = ser_lineState;
ser_lineState = 0;
}
/*----------------------------------------------------------------------------
serial port 1 interrupt
*---------------------------------------------------------------------------*/
void UART_IRQHandler(void)
{
volatile unsigned long iir;
iir = LPC_UART->IIR;
if ((iir & 0x4) || (iir & 0xC)) { // RDA or CTI pending
while (LPC_UART->LSR & 0x01) { // Rx FIFO is not empty
SER_BUF_WR(ser_in, LPC_UART->RBR); // Read Rx FIFO to buffer
}
}
if ((iir & 0x2)) { // TXMIS pending
if (SER_BUF_COUNT(ser_out) != 0) {
LPC_UART->THR = SER_BUF_RD(ser_out); // Write to the Tx FIFO
ser_txRestart = 0;
}
else {
ser_txRestart = 1;
}
}
ser_lineState = LPC_UART->LSR & 0x1E; // update linestate
return;
}

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firmware/usbcomp_msd_cdc/src/usbcomp.c Normal file
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/*----------------------------------------------------------------------------
* Name: vcomdemo.c
* Purpose: USB virtual COM port Demo
* Version: V1.02
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include "LPC13xx.h"
#include "type.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "cdc.h"
#include "cdcuser.h"
#include "serial.h"
#include "vcomdemo.h"
#include "mscuser.h"
#include "memory.h"
#include "stdio.h"
#include "string.h"
#include "edubrm.h"
extern uint8_t Memory[MSC_MemorySize]; /* MSC Memory in RAM */
#define EN_TIMER32_1 (1<<10)
#define EN_IOCON (1<<16)
#define EN_USBREG (1<<14)
/*----------------------------------------------------------------------------
Initializes the VCOM port.
Call this function before using VCOM_putchar or VCOM_getchar
*---------------------------------------------------------------------------*/
void VCOM_Init(void) {
CDC_Init ();
}
/*----------------------------------------------------------------------------
Reads character from serial port buffer and writes to USB buffer
*---------------------------------------------------------------------------*/
void VCOM_Serial2Usb(void) {
static char serBuf [USB_CDC_BUFSIZE];
int numBytesRead, numAvailByte;
ser_AvailChar (&numAvailByte);
if (numAvailByte > 0) {
if (CDC_DepInEmpty) {
numBytesRead = ser_Read (&serBuf[0], &numAvailByte);
CDC_DepInEmpty = 0;
USB_WriteEP (CDC_DEP_IN, (unsigned char *)&serBuf[0], numBytesRead);
}
}
}
/*----------------------------------------------------------------------------
Reads character from USB buffer and writes to serial port buffer
*---------------------------------------------------------------------------*/
void VCOM_Usb2Serial(void) {
static char serBuf [32];
int numBytesToRead, numBytesRead, numAvailByte;
CDC_OutBufAvailChar (&numAvailByte);
if (numAvailByte > 0) {
numBytesToRead = numAvailByte > 32 ? 32 : numAvailByte;
numBytesRead = CDC_RdOutBuf (&serBuf[0], &numBytesToRead);
ser_Write (&serBuf[0], &numBytesRead);
}
}
/*----------------------------------------------------------------------------
Reads character from USB buffer and writes to serial port buffer
*---------------------------------------------------------------------------*/
void VCOM_Usb2SerialTest(void) {
static char serBuf [32];
int numBytesRead;
strcpy(serBuf,"Test\n");
numBytesRead = strlen(serBuf);
ser_Write (&serBuf[0], &numBytesRead);
}
/*----------------------------------------------------------------------------
checks the serial state and initiates notification
*---------------------------------------------------------------------------*/
void VCOM_CheckSerialState (void) {
unsigned short temp;
static unsigned short serialState;
temp = CDC_GetSerialState();
if (serialState != temp) {
serialState = temp;
CDC_NotificationIn(); // send SERIAL_STATE notification
}
}
/*----------------------------------------------------------------------------
Main Program
*---------------------------------------------------------------------------*/
int main (void) {
uint32_t n;
for (n = 0; n < MSC_ImageSize; n++) { /* Copy Initial Disk Image */
Memory[n] = DiskImage[n]; /* from Flash to RAM */
}
/* Basic chip initialization is taken care of in SystemInit() called
* from the startup code. SystemInit() and chip settings are defined
* in the CMSIS system_<part family>.c file.
*/
/* Enable Timer32_1, IOCON, and USB blocks */
LPC_SYSCON->SYSAHBCLKCTRL |= (EN_TIMER32_1 | EN_IOCON | EN_USBREG);
USBIOClkConfig();
VCOM_Init(); // VCOM Initialization
USB_Init(); // USB Initialization
USB_Connect(TRUE); // USB Connect
while (!USB_Configuration) ; // wait until USB is configured
//VCOM_Usb2SerialTest();
enableLED();
while (1) { // Loop forever
VCOM_Brm2Usb();
VCOM_CheckSerialState();
VCOM_Usb2Brm();
} // end while
} // end main ()

1085
firmware/usbcomp_msd_cdc/src/usbcore.c Normal file
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279
firmware/usbcomp_msd_cdc/src/usbdesc.c Normal file
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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usbdesc.c
* Purpose: USB Descriptors
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------
* History:
* V1.20 Changed string descriptor handling
* V1.00 Initial Version
*---------------------------------------------------------------------------*/
#include "type.h"
#include "usb.h"
#include "cdc.h"
#include "usbcfg.h"
#include "usbdesc.h"
#include "msc.h"
#include "config.h"
/* USB Standard Device Descriptor */
const uint8_t USB_DeviceDescriptor[] = {
USB_DEVICE_DESC_SIZE, /* bLength */
USB_DEVICE_DESCRIPTOR_TYPE, /* bDescriptorType */
WBVAL(0x0200), /* 2.0 */ /* bcdUSB */
USB_DEVICE_CLASS_MISCELLANEOUS, /* bDeviceClass */
0x02, /* bDeviceSubClass */
0x01, /* bDeviceProtocol */
USB_MAX_PACKET0, /* bMaxPacketSize0 */
// 0x70, 0x08, /* idVendorL */ //this vendor code is here in order to bypase linux probing for ttyACM0
// 0x01, 0x00, /* idProductL */ //this product code is here in order to bypase linux probing for ttyACM0
WBVAL(USB_VENDOR_ID), /* idVendor */
WBVAL(USB_PROD_ID), /* idProduct */
WBVAL(USB_DEVICE), /* 1.00 */ /* bcdDevice */
0x01, /* iManufacturer */
0x02, /* iProduct */
0x03, /* iSerialNumber */
0x01 /* bNumConfigurations: one possible configuration*/
};
/* USB Configuration Descriptor */
/* All Descriptors (Configuration, Interface, Endpoint, Class, Vendor) */
const uint8_t USB_ConfigDescriptor[] = {
/* Configuration 1 */
USB_CONFIGUARTION_DESC_SIZE, /* bLength */
USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType */
WBVAL( /* wTotalLength */
1*USB_CONFIGUARTION_DESC_SIZE +
1*USB_INTERFACE_DESC_SIZE + /* mass storage interface */
2*USB_ENDPOINT_DESC_SIZE + /* bulk endpoints */
1*USB_INTERFACE_ASSOCIATION_DESC_SIZE + /* interface association */
1*USB_INTERFACE_DESC_SIZE + /* communication interface */
0x0013 + /* CDC functions */
1*USB_ENDPOINT_DESC_SIZE + /* interrupt endpoint */
1*USB_INTERFACE_DESC_SIZE + /* data interface */
2*USB_ENDPOINT_DESC_SIZE + /* bulk endpoints */
0
),
0x03, /* bNumInterfaces */
0x01, /* bConfigurationValue: 0x01 is used to select this configuration */
0x00, /* iConfiguration: no string to describe this configuration */
USB_CONFIG_BUS_POWERED /*|*/ /* bmAttributes */
/*USB_CONFIG_REMOTE_WAKEUP*/,
USB_CONFIG_POWER_MA(100), /* bMaxPower, device power consumption is 100 mA */
/* Interface 0, Alternate Setting 0, MSC Class */
USB_INTERFACE_DESC_SIZE, /* bLength */
USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_MSC_IF_NUM, /* bInterfaceNumber */
0x00, /* bAlternateSetting */
0x02, /* bNumEndpoints */
USB_DEVICE_CLASS_STORAGE, /* bInterfaceClass */
MSC_SUBCLASS_SCSI, /* bInterfaceSubClass */
MSC_PROTOCOL_BULK_ONLY, /* bInterfaceProtocol */
0x04, /* iInterface */
/* Endpoint, EP2 Bulk IN */
USB_ENDPOINT_DESC_SIZE, /* bLength */
USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_ENDPOINT_IN(2), /* bEndpointAddress */
USB_ENDPOINT_TYPE_BULK, /* bmAttributes */
WBVAL(0x0040), /* wMaxPacketSize */
0x00, /* bInterval: ignore for Bulk transfer */
/* Endpoint, EP2 Bulk OUT */
USB_ENDPOINT_DESC_SIZE, /* bLength */
USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_ENDPOINT_OUT(2), /* bEndpointAddress */
USB_ENDPOINT_TYPE_BULK, /* bmAttributes */
WBVAL(0x0040), /* wMaxPacketSize */
0x00, /* bInterval: ignore for Bulk transfer */
/* IAD to associate the two CDC interfaces */
USB_INTERFACE_ASSOCIATION_DESC_SIZE, /* bLength */
USB_INTERFACE_ASSOCIATION_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_CDC_CIF_NUM, /* bFirstInterface */
2, /* bInterfaceCount */
CDC_COMMUNICATION_INTERFACE_CLASS, /* bFunctionClass */
CDC_ABSTRACT_CONTROL_MODEL, /* bFunctionSubClass */
0, /* bFunctionProtocol */
0x06, /* iFunction (Index of string descriptor describing this function) */
/* Interface 0, Alternate Setting 0, Communication class interface descriptor */
USB_INTERFACE_DESC_SIZE, /* bLength */
USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_CDC_CIF_NUM, /* bInterfaceNumber: Number of Interface */
0x00, /* bAlternateSetting: Alternate setting */
0x01, /* bNumEndpoints: One endpoint used */
CDC_COMMUNICATION_INTERFACE_CLASS, /* bInterfaceClass: Communication Interface Class */
CDC_ABSTRACT_CONTROL_MODEL, /* bInterfaceSubClass: Abstract Control Model */
0x00, /* bInterfaceProtocol: no protocol used */
0x05, /* iInterface: */
/*Header Functional Descriptor*/
0x05, /* bLength: Endpoint Descriptor size */
CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */
CDC_HEADER, /* bDescriptorSubtype: Header Func Desc */
WBVAL(CDC_V1_10), /* 1.10 */ /* bcdCDC */
/*Call Management Functional Descriptor*/
0x05, /* bFunctionLength */
CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */
CDC_CALL_MANAGEMENT, /* bDescriptorSubtype: Call Management Func Desc */
0x01, /* bmCapabilities: device handles call management */
USB_CDC_DIF_NUM, /* bDataInterface: CDC data IF ID */
/*Abstract Control Management Functional Descriptor*/
0x04, /* bFunctionLength */
CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */
CDC_ABSTRACT_CONTROL_MANAGEMENT, /* bDescriptorSubtype: Abstract Control Management desc */
0x02, /* bmCapabilities: SET_LINE_CODING, GET_LINE_CODING, SET_CONTROL_LINE_STATE supported */
/*Union Functional Descriptor*/
0x05, /* bFunctionLength */
CDC_CS_INTERFACE, /* bDescriptorType: CS_INTERFACE */
CDC_UNION, /* bDescriptorSubtype: Union func desc */
USB_CDC_CIF_NUM, /* bMasterInterface: Communication class interface is master */
USB_CDC_DIF_NUM, /* bSlaveInterface0: Data class interface is slave 0 */
/*Endpoint 1 Descriptor*/ /* event notification (optional) */
USB_ENDPOINT_DESC_SIZE, /* bLength */
USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_ENDPOINT_IN(1), /* bEndpointAddress */
USB_ENDPOINT_TYPE_INTERRUPT, /* bmAttributes */
WBVAL(0x0010), /* wMaxPacketSize */
0x02, /* 2ms */ /* bInterval */
/* Interface 1, Alternate Setting 0, Data class interface descriptor*/
USB_INTERFACE_DESC_SIZE, /* bLength */
USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_CDC_DIF_NUM, /* bInterfaceNumber: Number of Interface */
0x00, /* bAlternateSetting: no alternate setting */
0x02, /* bNumEndpoints: two endpoints used */
CDC_DATA_INTERFACE_CLASS, /* bInterfaceClass: Data Interface Class */
0x00, /* bInterfaceSubClass: no subclass available */
0x00, /* bInterfaceProtocol: no protocol used */
0x05, /* iInterface: */
/* Endpoint, EP3 Bulk Out */
USB_ENDPOINT_DESC_SIZE, /* bLength */
USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_ENDPOINT_OUT(3), /* bEndpointAddress */
USB_ENDPOINT_TYPE_BULK, /* bmAttributes */
WBVAL(USB_CDC_BUFSIZE), /* wMaxPacketSize */
0x00, /* bInterval: ignore for Bulk transfer */
/* Endpoint, EP3 Bulk In */
USB_ENDPOINT_DESC_SIZE, /* bLength */
USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType */
USB_ENDPOINT_IN(3), /* bEndpointAddress */
USB_ENDPOINT_TYPE_BULK, /* bmAttributes */
WBVAL(USB_CDC_BUFSIZE), /* wMaxPacketSize */
0x00, /* bInterval: ignore for Bulk transfer */
/* Terminator */
0 /* bLength */
};
/* USB String Descriptor (optional) */
const uint8_t USB_StringDescriptor[] = {
/* Index 0x00: LANGID Codes */
0x04, /* bLength */
USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */
WBVAL(0x0409), /* US English */ /* wLANGID */
/* Index 0x01: Manufacturer */
(13*2 + 2), /* bLength (13 Char + Type + lenght) */
USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */
'N',0,
'X',0,
'P',0,
' ',0,
'S',0,
'E',0,
'M',0,
'I',0,
'C',0,
'O',0,
'N',0,
'D',0,
' ',0,
/* Index 0x02: Product */
(21*2 + 2), /* bLength ( 21 Char + Type + lenght) */
USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */
'N',0,
'X',0,
'P',0,
' ',0,
'L',0,
'P',0,
'C',0,
'1',0,
'3',0,
'x',0,
'x',0,
' ',0,
'M',0,
'S',0,
'D',0,
'/',0,
'V',0,
'C',0,
'O',0,
'M',0,
' ',0,
/* Index 0x03: Serial Number */
(16*2 + 2), /* bLength (12 Char + Type + lenght) */
USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */
'C',0,
'O',0,
'M',0,
'P',0,
'O',0,
'S',0,
'I',0,
'T',0,
'E',0,
' ',0,
'D',0,
'E',0,
'M',0,
'O',0,
' ',0,
' ',0,
/* Index 0x04: Interface 0, Alternate Setting 0 */
( 6*2 + 2), /* bLength (6 Char + Type + lenght) */
USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */
'M',0,
'e',0,
'm',0,
'o',0,
'r',0,
'y',0,
/* Index 0x05: Interface 0, Alternate Setting 0 */
( 4*2 + 2), /* bLength (4 Char + Type + lenght) */
USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */
'V',0,
'C',0,
'O',0,
'M',0,
/* Index 0x05: Interface 0, Alternate Setting 0 */
( 8*2 + 2), /* bLength (4 Char + Type + lenght) */
USB_STRING_DESCRIPTOR_TYPE, /* bDescriptorType */
'C',0,
'O',0,
'M',0,
'/',0,
'D',0,
'A',0,
'T',0,
'A',0,
};

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usbhw.c
* Purpose: USB Hardware Layer Module for Philips LPC17xx
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------
* History:
* V1.20 Added USB_ClearEPBuf
* V1.00 Initial Version
*----------------------------------------------------------------------------*/
#include "LPC13xx.h" /* LPC13xx definitions */
#include "usb.h"
#include "usbcfg.h"
#include "usbreg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
/*
* USB and IO Clock configuration only.
* The same as call PeriClkIOInit(IOCON_USB);
* The purpose is to reduce the code space for
* overall USB project and reserve code space for
* USB debugging.
* Parameters: None
* Return Value: None
*/
void USBIOClkConfig( void )
{
/* Enable AHB clock to the GPIO domain. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6);
LPC_IOCON->PIO0_1 &= ~0x07;
LPC_IOCON->PIO0_1 |= 0x01; /* CLK OUT */
/* Enable AHB clock to the USB block. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<14);
LPC_IOCON->PIO0_3 &= ~0x1F;
LPC_IOCON->PIO0_3 |= 0x01; /* Secondary function VBUS */
LPC_IOCON->PIO0_6 &= ~0x07;
LPC_IOCON->PIO0_6 |= 0x01; /* Secondary function SoftConn */
return;
}
/*
* Delay number of clock cycles
* Parameters: Delay length
* Return Value: None
*/
void delay (uint32_t length ) {
uint32_t i;
for ( i = 0; i < length; i++ );
return;
}
/*
* Get Endpoint Physical Address
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: Endpoint Physical Address
*/
uint32_t EPAdr (uint32_t EPNum) {
uint32_t val;
val = (EPNum & 0x0F) << 1;
if (EPNum & 0x80) {
val += 1;
}
return (val);
}
/*
* Write Command
* Parameters: cmd: Command
* Return Value: None
*/
void WrCmd (uint32_t cmd) {
LPC_USB->DevIntClr = CCEMTY_INT;
LPC_USB->CmdCode = cmd;
while ((LPC_USB->DevIntSt & (CCEMTY_INT | DEV_STAT_INT)) == 0);
}
/*
* Write Command Data
* Parameters: cmd: Command
* val: Data
* Return Value: None
*/
void WrCmdDat (uint32_t cmd, uint32_t val) {
WrCmd(cmd);
WrCmd(val);
}
/*
* Write Command to Endpoint
* Parameters: cmd: Command
* val: Data
* Return Value: None
*/
void WrCmdEP (uint32_t EPNum, uint32_t cmd){
WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
WrCmd(cmd);
}
/*
* Read Command Data
* Parameters: cmd: Command
* Return Value: Data Value
*/
uint32_t RdCmdDat (uint32_t cmd) {
LPC_USB->DevIntClr = CCEMTY_INT | CDFULL_INT;
LPC_USB->CmdCode = cmd;
while ((LPC_USB->DevIntSt & (CDFULL_INT | DEV_STAT_INT)) == 0);
return (LPC_USB->CmdData);
}
/*
* USB Initialize Function
* Called by the User to initialize USB
* Return Value: None
*/
void USB_Init (void) {
#if USB_FIQ_EVENT
/* It's important that only BULK and FRAME(ISO) can be routed
to FIQ. */
LPC_USB->DevFIQSel = 0x01; /* SOF Use FIQ */
/* Enable the USB Interrupt */
NVIC_EnableIRQ(USB_FIQn);
#endif
/* Enable the USB Interrupt */
NVIC_EnableIRQ(USB_IRQn);
USB_Reset();
USB_SetAddress(0);
return;
}
/*
* USB Connect Function
* Called by the User to Connect/Disconnect USB
* Parameters: con: Connect/Disconnect
* Return Value: None
*/
void USB_Connect (uint32_t con) {
WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(con ? DEV_CON : 0));
}
/*
* USB Reset Function
* Called automatically on USB Reset
* Return Value: None
*/
void USB_Reset (void) {
LPC_USB->DevIntClr = 0x000FFFFF;
/* Enable all eight(8) EPs, note: EP won't be ready until it's
configured/enabled when device sending SetEPStatus command
to the command engine. */
LPC_USB->DevIntEn = DEV_STAT_INT | (0xFF<<1) |
(USB_SOF_EVENT ? FRAME_INT : 0);
return;
}
/*
* USB Suspend Function
* Called automatically on USB Suspend
* Return Value: None
*/
void USB_Suspend (void) {
/* Performed by Hardware */
}
/*
* USB Resume Function
* Called automatically on USB Resume
* Return Value: None
*/
void USB_Resume (void) {
/* Performed by Hardware */
}
/*
* USB Remote Wakeup Function
* Called automatically on USB Remote Wakeup
* Return Value: None
*/
void USB_WakeUp (void) {
if (USB_DeviceStatus & USB_GETSTATUS_REMOTE_WAKEUP) {
WrCmdDat(CMD_SET_DEV_STAT, DAT_WR_BYTE(DEV_CON));
}
}
/*
* USB Remote Wakeup Configuration Function
* Parameters: cfg: Enable/Disable
* Return Value: None
*/
void USB_WakeUpCfg (uint32_t cfg) {
cfg = cfg; /* Not needed */
}
/*
* USB Set Address Function
* Parameters: adr: USB Address
* Return Value: None
*/
void USB_SetAddress (uint32_t adr) {
WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Don't wait for next */
WrCmdDat(CMD_SET_ADDR, DAT_WR_BYTE(DEV_EN | adr)); /* Setup Status Phase */
}
/*
* USB Configure Function
* Parameters: cfg: Configure/Deconfigure
* Return Value: None
*/
void USB_Configure (uint32_t cfg) {
WrCmdDat(CMD_CFG_DEV, DAT_WR_BYTE(cfg ? CONF_DVICE : 0));
return;
}
/*
* Configure USB Endpoint according to Descriptor
* Parameters: pEPD: Pointer to Endpoint Descriptor
* Return Value: None
*/
void USB_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
return;
}
/*
* Set Direction for USB Control Endpoint
* Parameters: dir: Out (dir == 0), In (dir <> 0)
* Return Value: None
*/
void USB_DirCtrlEP (uint32_t dir) {
dir = dir; /* Not needed */
}
/*
* Enable USB Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_EnableEP (uint32_t EPNum) {
WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
}
/*
* Disable USB Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_DisableEP (uint32_t EPNum) {
WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_DA));
}
/*
* Reset USB Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_ResetEP (uint32_t EPNum) {
WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
}
/*
* Set Stall for USB Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_SetStallEP (uint32_t EPNum) {
WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(EP_STAT_ST));
}
/*
* Clear Stall for USB Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_ClrStallEP (uint32_t EPNum) {
WrCmdDat(CMD_SET_EP_STAT(EPAdr(EPNum)), DAT_WR_BYTE(0));
}
/*
* Clear USB Endpoint Buffer
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_ClearEPBuf (uint32_t EPNum) {
WrCmdEP(EPNum, CMD_CLR_BUF);
}
/*
* Read USB Endpoint Data
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* pData: Pointer to Data Buffer
* Return Value: Number of bytes read
*/
uint32_t USB_ReadEP (uint32_t EPNum, uint8_t *pData) {
uint32_t cnt, n;
LPC_USB->Ctrl = ((EPNum & 0x0F) << 2) | CTRL_RD_EN;
/* 3 clock cycles to fetch the packet length from RAM. */
delay( 5 );
do {
cnt = LPC_USB->RxPLen;
} while ((cnt & PKT_DV) == 0);
cnt &= PKT_LNGTH_MASK;
for (n = 0; n < (cnt + 3) / 4; n++) {
*((uint32_t __attribute__((packed)) *)pData) = LPC_USB->RxData;
pData += 4;
}
LPC_USB->Ctrl = 0;
if ((EPNum & 0x80) != 0x04) { /* Non-Isochronous Endpoint */
WrCmdEP(EPNum, CMD_CLR_BUF);
}
return (cnt);
}
/*
* Write USB Endpoint Data
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* pData: Pointer to Data Buffer
* cnt: Number of bytes to write
* Return Value: Number of bytes written
*/
uint32_t USB_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
uint32_t n;
LPC_USB->Ctrl = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
/* 3 clock cycles to fetch the packet length from RAM. */
delay( 5 );
LPC_USB->TxPLen = cnt;
for (n = 0; n < (cnt + 3) / 4; n++) {
LPC_USB->TxData = *((uint32_t __attribute__((packed)) *)pData);
pData += 4;
}
LPC_USB->Ctrl = 0;
WrCmdEP(EPNum, CMD_VALID_BUF);
return (cnt);
}
/*
* Get USB Last Frame Number
* Parameters: None
* Return Value: Frame Number
*/
uint32_t USB_GetFrame (void) {
uint32_t val;
WrCmd(CMD_RD_FRAME);
val = RdCmdDat(DAT_RD_FRAME);
val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
return (val);
}
/*
* USB Interrupt Service Routine
*/
void USB_IRQHandler (void)
{
uint32_t disr, val, n, m;
disr = LPC_USB->DevIntSt; /* Device Interrupt Status */
LPC_USB->DevIntClr = disr;
/* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
if (disr & DEV_STAT_INT) {
WrCmd(CMD_GET_DEV_STAT);
val = RdCmdDat(DAT_GET_DEV_STAT); /* Device Status */
if (val & DEV_RST) { /* Reset */
USB_Reset();
#if USB_RESET_EVENT
USB_Reset_Event();
#endif
}
if (val & DEV_CON_CH) { /* Connect change */
#if USB_POWER_EVENT
USB_Power_Event(val & DEV_CON);
#endif
}
if (val & DEV_SUS_CH) { /* Suspend/Resume */
if (val & DEV_SUS) { /* Suspend */
USB_Suspend();
#if USB_SUSPEND_EVENT
USB_Suspend_Event();
#endif
} else { /* Resume */
USB_Resume();
#if USB_RESUME_EVENT
USB_Resume_Event();
#endif
}
}
goto isr_end;
}
#if USB_SOF_EVENT
/* Start of Frame Interrupt */
if (disr & FRAME_INT) {
LPC_USB->DevIntClr = FRAME_INT;
USB_SOF_Event();
SOFIRQCount++;
}
#endif
#if USB_ERROR_EVENT
/* NO error interrupt anymore, below code can be used
as example to get error status from command engine. */
/* Error Interrupt */
if (disr & ERR_INT) {
WrCmd(CMD_RD_ERR_STAT);
val = RdCmdDat(DAT_RD_ERR_STAT);
USB_Error_Event(val);
}
#endif
/* Endpoint's Interrupt */
if (disr & (0xFF<<1)) {
/* if any of the EP0 through EP7 is set, or bit 1 through 9 on disr */
for (n = 0; n < USB_EP_NUM; n++) { /* Check All Endpoints */
/* skip frame interrupt at bit 0 in disr */
// if (disr & ((1 << n)<<1)) {
if ((disr>>1) & (1 << n)) {
m = n >> 1;
/* clear EP interrupt by sending cmd to the command engine. */
WrCmd(CMD_SEL_EP_CLRI(n));
val = RdCmdDat(DAT_SEL_EP_CLRI(n));
if ((n & 1) == 0) { /* OUT Endpoint */
if (n == 0) { /* Control OUT Endpoint */
if (val & EP_SEL_STP) { /* Setup Packet */
if (USB_P_EP[0]) {
USB_P_EP[0](USB_EVT_SETUP);
continue;
}
}
}
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_OUT);
}
} else { /* IN Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_IN);
}
}
}
}
}
isr_end:
return;
}

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/*----------------------------------------------------------------------------
* U S B - K e r n e l
*----------------------------------------------------------------------------
* Name: usbuser.c
* Purpose: USB Custom User Module
* Version: V1.20
*----------------------------------------------------------------------------
* This software is supplied "AS IS" without any warranties, express,
* implied or statutory, including but not limited to the implied
* warranties of fitness for purpose, satisfactory quality and
* noninfringement. Keil extends you a royalty-free right to reproduce
* and distribute executable files created using this software for use
* on NXP Semiconductors LPC microcontroller devices only. Nothing else
* gives you the right to use this software.
*
* Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
*---------------------------------------------------------------------------*/
#include "type.h"
#include "usb.h"
#include "usbcfg.h"
#include "usbhw.h"
#include "usbcore.h"
#include "usbuser.h"
#include "cdcuser.h"
#include "mscuser.h"
#include "memory.h"
/*
* USB Power Event Callback
* Called automatically on USB Power Event
* Parameter: power: On(TRUE)/Off(FALSE)
*/
#if USB_POWER_EVENT
void USB_Power_Event (uint32_t power) {
}
#endif
/*
* USB Reset Event Callback
* Called automatically on USB Reset Event
*/
#if USB_RESET_EVENT
void USB_Reset_Event (void) {
USB_ResetCore();
}
#endif
/*
* USB Suspend Event Callback
* Called automatically on USB Suspend Event
*/
#if USB_SUSPEND_EVENT
void USB_Suspend_Event (void) {
}
#endif
/*
* USB Resume Event Callback
* Called automatically on USB Resume Event
*/
#if USB_RESUME_EVENT
void USB_Resume_Event (void) {
}
#endif
/*
* USB Remote Wakeup Event Callback
* Called automatically on USB Remote Wakeup Event
*/
#if USB_WAKEUP_EVENT
void USB_WakeUp_Event (void) {
}
#endif
/*
* USB Start of Frame Event Callback
* Called automatically on USB Start of Frame Event
*/
#if USB_SOF_EVENT
void USB_SOF_Event (void) {
}
#endif
/*
* USB Error Event Callback
* Called automatically on USB Error Event
* Parameter: error: Error Code
*/
#if USB_ERROR_EVENT
void USB_Error_Event (uint32_t error) {
}
#endif
/*
* USB Set Configuration Event Callback
* Called automatically on USB Set Configuration Request
*/
#if USB_CONFIGURE_EVENT
void USB_Configure_Event (void) {
if (USB_Configuration) { /* Check if USB is configured */
/* add your code here */
}
}
#endif
/*
* USB Set Interface Event Callback
* Called automatically on USB Set Interface Request
*/
#if USB_INTERFACE_EVENT
void USB_Interface_Event (void) {
}
#endif
/*
* USB Set/Clear Feature Event Callback
* Called automatically on USB Set/Clear Feature Request
*/
#if USB_FEATURE_EVENT
void USB_Feature_Event (void) {
}
#endif
#define P_EP(n) ((USB_EP_EVENT & (1 << (n))) ? USB_EndPoint##n : NULL)
/* USB Endpoint Events Callback Pointers */
void (* const USB_P_EP[USB_LOGIC_EP_NUM]) (uint32_t event) = {
P_EP(0),
P_EP(1),
P_EP(2),
P_EP(3),
P_EP(4),
};
/*
* USB Endpoint 1 Event Callback
* Called automatically on USB Endpoint 1 Event
* Parameter: event
*/
void USB_EndPoint1 (uint32_t event) {
uint16_t temp;
static uint16_t serialState;
switch (event) {
case USB_EVT_IN:
temp = CDC_GetSerialState();
if (serialState != temp) {
serialState = temp;
CDC_NotificationIn(); /* send SERIAL_STATE notification */
}
break;
}
}
/*
* USB Endpoint 2 Event Callback
* Called automatically on USB Endpoint 2 Event
* Parameter: event
*/
void USB_EndPoint2 (uint32_t event) {
switch (event) {
case USB_EVT_OUT:
MSC_BulkOut();
break;
case USB_EVT_IN:
MSC_BulkIn();
break;
}
}
/*
* USB Endpoint 3 Event Callback
* Called automatically on USB Endpoint 3 Event
* Parameter: event
*/
void USB_EndPoint3 (uint32_t event) {
switch (event) {
case USB_EVT_OUT:
CDC_BulkOut (); /* data received from Host */
break;
case USB_EVT_IN:
CDC_BulkIn (); /* data expected from Host */
break;
}
}

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