From af36fa43f0c974aa0edaa63a6b80af66593ef2e6 Mon Sep 17 00:00:00 2001 From: BIITER Date: Wed, 27 Apr 2011 00:06:22 +0200 Subject: [PATCH] piny --- firmware/src/LPC13xx.h | 10 ++++----- firmware/src/adc.c | 24 +++++++++----------- firmware/src/edubrm.c | 40 ++++++++++++++++++++++++++------- firmware/src/edubrm.h | 2 ++ firmware/src/ssp.c | 5 +++-- firmware/src/usbhidrom_main.c | 8 +++---- software/device.py | 2 +- software/modules/ModuleDebug.py | 2 +- 8 files changed, 57 insertions(+), 36 deletions(-) diff --git a/firmware/src/LPC13xx.h b/firmware/src/LPC13xx.h index d7582e5..978ab95 100644 --- a/firmware/src/LPC13xx.h +++ b/firmware/src/LPC13xx.h @@ -238,18 +238,18 @@ typedef struct __IO uint32_t PIO0_8; __IO uint32_t PIO0_9; - __IO uint32_t JTAG_TCK_PIO0_10; + __IO uint32_t PIO0_10; __IO uint32_t PIO1_10; __IO uint32_t PIO2_11; __IO uint32_t PIO0_11; // JTAG_TDI_PIO0_11 - __IO uint32_t JTAG_TMS_PIO1_0; - __IO uint32_t JTAG_TDO_PIO1_1; + __IO uint32_t PIO1_0; + __IO uint32_t PIO1_1; - __IO uint32_t JTAG_nTRST_PIO1_2; + __IO uint32_t PIO1_2; __IO uint32_t PIO3_0; __IO uint32_t PIO3_1; __IO uint32_t PIO2_3; - __IO uint32_t ARM_SWDIO_PIO1_3; + __IO uint32_t PIO1_3; __IO uint32_t PIO1_4; __IO uint32_t PIO1_11; __IO uint32_t PIO3_2; diff --git a/firmware/src/adc.c b/firmware/src/adc.c index abaeb0c..39b7e47 100644 --- a/firmware/src/adc.c +++ b/firmware/src/adc.c @@ -160,26 +160,22 @@ void ADCInit( uint32_t ADC_Clk ) to design team. */ LPC_IOCON->PIO0_11 &= ~0x8F; /* ADC I/O config */ LPC_IOCON->PIO0_11 |= 0x02; /* ADC IN0 */ - -#ifdef __JTAG_DISABLED - - LPC_IOCON->R_PIO1_0 &= ~0x8F; - LPC_IOCON->R_PIO1_0 |= 0x02; /* ADC IN1 */ - LPC_IOCON->R_PIO1_1 &= ~0x8F; - LPC_IOCON->R_PIO1_1 |= 0x02; /* ADC IN2 */ - LPC_IOCON->R_PIO1_2 &= ~0x8F; - LPC_IOCON->R_PIO1_2 |= 0x02; /* ADC IN3 */ -#ifdef __SWD_DISABLED - LPC_IOCON->SWDIO_PIO1_3 &= ~0x8F; - LPC_IOCON->SWDIO_PIO1_3 |= 0x02; /* ADC IN4 */ -#endif -#endif +#if 0 + LPC_IOCON->PIO1_0 &= ~0x8F; + LPC_IOCON->PIO1_0 |= 0x02; /* ADC IN1 */ + LPC_IOCON->PIO1_1 &= ~0x8F; + LPC_IOCON->PIO1_1 |= 0x02; /* ADC IN2 */ + LPC_IOCON->PIO1_2 &= ~0x8F; + LPC_IOCON->PIO1_2 |= 0x02; /* ADC IN3 */ + LPC_IOCON->PIO1_3 &= ~0x8F; + LPC_IOCON->PIO1_3 |= 0x02; /* ADC IN4 */ LPC_IOCON->PIO1_4 &= ~0x8F; /* Clear bit7, change to analog mode. */ LPC_IOCON->PIO1_4 |= 0x01; /* ADC IN5 */ LPC_IOCON->PIO1_10 &= ~0x8F; /* Clear bit7, change to analog mode. */ LPC_IOCON->PIO1_10 |= 0x01; /* ADC IN6 */ LPC_IOCON->PIO1_11 &= ~0x8F; /* Clear bit7, change to analog mode. */ LPC_IOCON->PIO1_11 |= 0x01; /* ADC IN7 */ +#endif LPC_ADC->CR = ( 0x01 << 0 ) | /* SEL=1,select channel 0~7 on ADC0 */ (((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/ADC_Clk-1)<<8) | /* CLKDIV = Fpclk / 1000000 - 1 */ diff --git a/firmware/src/edubrm.c b/firmware/src/edubrm.c index c623eda..dfd7ae1 100644 --- a/firmware/src/edubrm.c +++ b/firmware/src/edubrm.c @@ -15,9 +15,11 @@ void GetInReport (uint8_t src[], uint32_t length) src[i*2 ] = v & 0xff; src[i*2+1] = (v>>8) & 0xff; } - // TODO: fix the following - replace IP[i] with real value of input pin (I) - // src[14] = IP[0] + (IP[1]<<1) + (IP[2]<<2); src[14] = 0; + src[14] |= (LPC_GPIO2->MASKED_ACCESS[1<<0] & (1<<0)); + src[14] |= (LPC_GPIO2->MASKED_ACCESS[1<<6] & (1<<6)); + src[14] |= (LPC_GPIO2->MASKED_ACCESS[1<<7] & (1<<7)); + } void SetOutReport (uint8_t dst[], uint32_t length) @@ -82,22 +84,44 @@ void SetOutReport (uint8_t dst[], uint32_t length) } } +void PinInit() { + PinDir(0); // all 3 pins are output 0 + PinState(1, 0); + PinState(2, 0); + PinState(3, 0); +} + +void EduInit() { + SSPInit(); + ADCInit(ADC_CLK); + PinInit(); +} + void PinDir(uint16_t mask) { mask &= 7; + mask ^= 7; mask = ((mask & 4) << 5) | ((mask & 2) << 5) | (mask & 1); LPC_GPIO2->DIR |= mask; mask |= ~(1<<0 | 1<<6 | 1<<7); LPC_GPIO2->DIR &= mask; - LPC_GPIO2->MASKED_ACCESS[1<<0] |= 1<<0; - LPC_GPIO2->MASKED_ACCESS[1<<6] |= 1<<6; - LPC_GPIO2->MASKED_ACCESS[1<<7] |= 1<<7; + if (!(mask & 1)) + PinState(1, 0); + + if (!(mask & (1<<6))) + PinState(2, 0); + + if (!(mask & (1<<7))) + PinState(3, 0); + } void PinState(uint8_t which, uint8_t state) { -// if (which > 1) which += 4; -// LPC_GPIO2->MASKED_ACCESS[1<MASKED_ACCESS[1< 0)which += 5; + LPC_GPIO2->MASKED_ACCESS[1<MASKED_ACCESS[1<PRESETCTRL |= (0x01<<0); // SSP reset de-asserted @@ -73,6 +72,8 @@ LPC_SSP->CR1 = (0x01<<1) | (0x00<<2); /* enable all error related interrupts */ LPC_SSP->IMSC = (0x1<<0) | (0x1<<1); +/* old debug display routine +* uint32_t i; // command LPC_GPIO0->MASKED_ACCESS[0x01<<7] = 0 << 7; @@ -87,5 +88,5 @@ LPC_GPIO0->MASKED_ACCESS[0x01<<7] = 1 << 7; // clear display for (i=0;i<84*6;i++) SSPSend((uint8_t *)"\x00", 1); - +*/ } diff --git a/firmware/src/usbhidrom_main.c b/firmware/src/usbhidrom_main.c index c3f7d0d..83ca4cb 100644 --- a/firmware/src/usbhidrom_main.c +++ b/firmware/src/usbhidrom_main.c @@ -43,12 +43,8 @@ int main (void) SystemInit(); //#endif - SSPInit(); - - ADCInit(ADC_CLK); - // enable read on pin PIO3_3 - LPC_GPIO3->DIR &= ~(1<<3); + // LPC_GPIO3->DIR &= ~(1<<3); HidDevInfo.idVendor = USB_VENDOR_ID; HidDevInfo.idProduct = USB_PROD_ID; @@ -89,6 +85,8 @@ int main (void) LPC_GPIO2->MASKED_ACCESS[1<<6] |= 1<<6; LPC_GPIO2->MASKED_ACCESS[1<<7] |= 1<<7; + EduInit(); + while (1) __WFI(); } diff --git a/software/device.py b/software/device.py index 27d4cd3..53bdfda 100644 --- a/software/device.py +++ b/software/device.py @@ -79,7 +79,7 @@ class Device: if self.fake: print 'setout', which, state else: - self.epo.write('o' + chr(which<<1 + state)) + self.epo.write('o' + chr((which<<1) + state)) # 7x AD (16 bits) + 3 x I def read(self): diff --git a/software/modules/ModuleDebug.py b/software/modules/ModuleDebug.py index 32bf474..f7192df 100644 --- a/software/modules/ModuleDebug.py +++ b/software/modules/ModuleDebug.py @@ -29,7 +29,7 @@ class ModuleDebugWidget(QWidget): # real device: self.dev = Device() # fake device: -# self.dev = Device(True) + # self.dev = Device(True) self.timer = QTimer() QObject.connect(self.timer, SIGNAL("timeout()"), self.read_inputs)