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https://github.com/brmlab/edubrm.git
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implement fake device
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parent
f37c8b64dc
commit
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2 changed files with 78 additions and 105 deletions
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@ -1,5 +1,3 @@
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import usb
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class Device:
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VENDORID = 0x1fc9
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@ -7,55 +5,88 @@ class Device:
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INSIZE = 64
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OUTSIZE = 64
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def __init__(self):
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usbdev = usb.core.find(idVendor = self.VENDORID, idProduct = self.PRODUCTID)
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if usbdev == None:
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raise Exception('EduBRM device not found')
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try:
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usbdev.detach_kernel_driver(0)
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except:
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pass
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usbdev.set_configuration()
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self.epo = usb.util.find_descriptor(usbdev.get_interface_altsetting(),
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custom_match = lambda e: \
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usb.util.endpoint_direction(e.bEndpointAddress) == usb.util.ENDPOINT_OUT)
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self.epi = usb.util.find_descriptor(usbdev.get_interface_altsetting(),
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custom_match = lambda e: \
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usb.util.endpoint_direction(e.bEndpointAddress) == usb.util.ENDPOINT_IN)
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def __init__(self, fake = False):
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self.fake = fake
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if not fake:
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import usb
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usbdev = usb.core.find(idVendor = self.VENDORID, idProduct = self.PRODUCTID)
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if usbdev == None:
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raise Exception('EduBRM device not found')
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try:
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usbdev.detach_kernel_driver(0)
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except:
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pass
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usbdev.set_configuration()
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self.epo = usb.util.find_descriptor(usbdev.get_interface_altsetting(),
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custom_match = lambda e: \
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usb.util.endpoint_direction(e.bEndpointAddress) == usb.util.ENDPOINT_OUT)
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self.epi = usb.util.find_descriptor(usbdev.get_interface_altsetting(),
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custom_match = lambda e: \
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usb.util.endpoint_direction(e.bEndpointAddress) == usb.util.ENDPOINT_IN)
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else:
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print 'device init'
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# sets pwm (which=1,2), (duty=16bit)
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def pwm(self, which, duty):
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duty = 65535 - duty
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self.epo.write('p' + chr(which) + chr(duty & 0xff) + chr(duty >> 8))
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if self.fake:
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print 'pwm', which, duty
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else:
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duty = 65535 - duty
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self.epo.write('p' + chr(which) + chr(duty & 0xff) + chr(duty >> 8))
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# sets ddswave (wave=square,sine,saw1,saw2)
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def ddswave(self, wavetype):
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self.epo.write('d' + chr(wavetype))
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if self.fake:
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print 'dds wave', wavetype
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else:
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self.epo.write('d' + chr(wavetype))
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# sets ddsfreq (freq=32bit)
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def ddsfreq(self, freq):
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self.epo.write('D' + chr(freq & 0xff) + chr((freq >> 8) & 0xff) + chr((freq >> 16) & 0xff) + chr(freq >> 24))
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if self.fake:
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print 'dds freq', freq
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else:
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self.epo.write('D' + chr(freq & 0xff) + chr((freq >> 8) & 0xff) + chr((freq >> 16) & 0xff) + chr(freq >> 24))
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# set opamp (which=1,2), (chan=1..6), (gain=1, 2, 4, 5, 8, 10, 16, 32)
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def opamp(self, which, chan, gain):
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self.epo.write('m' + chr(which) + chr(chan) + chr(gain))
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if self.fake:
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print 'opamp', which, chan, gain
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else:
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self.epo.write('m' + chr(which) + chr(chan) + chr(gain))
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# set all switches (states=6bit)
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def switches(self, states):
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self.epo.write('s' + chr(states))
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if self.fake:
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print 'switches', states
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else:
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self.epo.write('s' + chr(states))
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# set pins state (states=3bit) (1 = input, 0 = output)
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def setpins(self, states):
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self.epo.write('P' + chr(states))
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if self.fake:
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print 'setpins', states
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else:
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self.epo.write('P' + chr(states))
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# set output (which=1,2,3), (state=0,1)
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def setout(self, which, state):
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self.epo.write('o' + chr(which<<1 + state))
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if self.fake:
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print 'setout', which, state
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else:
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self.epo.write('o' + chr(which<<1 + state))
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# 7x AD (16 bits) + 3 x I
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def read(self):
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# 7x AD (16 bits) + 3 x I
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i = self.epi.read(self.INSIZE)
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return (i[0] + i[1]<<8, # AD0
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i[2] + i[3]<<8, i[4] + i[5]<<8, i[6] + i[7]<<8, # AD1 .. AD3
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i[9] + i[9]<<8, i[10] + i[11]<<8, i[12] + i[13]<<8, # AD4 .. AD6
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i[14] & 0x01, (i[14] & 0x02) >> 1, (i[14] & 0x04) >> 2) # IO1 .. IO3
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if self.fake:
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from random import randint
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return (randint(0,65535), # AD0
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randint(0,65535), randint(0,65535), randint(0,65535), # AD1 .. AD3
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randint(0,65535), randint(0,65535), randint(0,65535), # AD4 .. AD6
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randint(0,7)) # IO1 .. IO3
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else:
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i = self.epi.read(self.INSIZE)
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return (i[0] + i[1]<<8, # AD0
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i[2] + i[3]<<8, i[4] + i[5]<<8, i[6] + i[7]<<8, # AD1 .. AD3
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i[9] + i[9]<<8, i[10] + i[11]<<8, i[12] + i[13]<<8, # AD4 .. AD6
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i[14] & 0x01, (i[14] & 0x02) >> 1, (i[14] & 0x04) >> 2) # IO1 .. IO3
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