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dos2unix
This commit is contained in:
Pavol Rusnak
parent
2b9ef9759b
commit
f30c462567
2 changed files with 318 additions and 318 deletions
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@ -1,274 +1,274 @@
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/****************************************************************************
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/****************************************************************************
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* $Id:: adc.c 3633 2010-06-01 23:03:16Z usb00423 $
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* $Id:: adc.c 3633 2010-06-01 23:03:16Z usb00423 $
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* Project: NXP LPC13xx ADC example
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* Project: NXP LPC13xx ADC example
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*
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*
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* Description:
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* Description:
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* This file contains ADC code example which include ADC
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* This file contains ADC code example which include ADC
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* initialization, ADC interrupt handler, and APIs for ADC
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* initialization, ADC interrupt handler, and APIs for ADC
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* reading.
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* reading.
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*
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*
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****************************************************************************
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****************************************************************************
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* Software that is described herein is for illustrative purposes only
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* use without further testing or modification.
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****************************************************************************/
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****************************************************************************/
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#include "LPC13xx.h" /* LPC13xx Peripheral Registers */
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#include "LPC13xx.h" /* LPC13xx Peripheral Registers */
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#include "adc.h"
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#include "adc.h"
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volatile uint32_t ADCValue[ADC_NUM];
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volatile uint32_t ADCValue[ADC_NUM];
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volatile uint32_t ADCIntDone = 0;
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volatile uint32_t ADCIntDone = 0;
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#if BURST_MODE
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#if BURST_MODE
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volatile uint32_t channel_flag;
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volatile uint32_t channel_flag;
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#endif
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#endif
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#if ADC_INTERRUPT_FLAG
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#if ADC_INTERRUPT_FLAG
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/******************************************************************************
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/******************************************************************************
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** Function name: ADC_IRQHandler
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** Function name: ADC_IRQHandler
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**
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**
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** Descriptions: ADC interrupt handler
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** Descriptions: ADC interrupt handler
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**
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**
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** parameters: None
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** parameters: None
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** Returned value: None
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** Returned value: None
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**
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**
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******************************************************************************/
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******************************************************************************/
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void ADC_IRQHandler (void)
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void ADC_IRQHandler (void)
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{
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{
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uint32_t regVal;
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uint32_t regVal;
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regVal = LPC_ADC->STAT; /* Read ADC will clear the interrupt */
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regVal = LPC_ADC->STAT; /* Read ADC will clear the interrupt */
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if ( regVal & 0x0000FF00 ) /* check OVERRUN error first */
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if ( regVal & 0x0000FF00 ) /* check OVERRUN error first */
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{
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{
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regVal = (regVal & 0x0000FF00) >> 0x08;
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regVal = (regVal & 0x0000FF00) >> 0x08;
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/* if overrun, just read ADDR to clear */
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/* if overrun, just read ADDR to clear */
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/* regVal variable has been reused. */
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/* regVal variable has been reused. */
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switch ( regVal )
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switch ( regVal )
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{
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{
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case 0x01:
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case 0x01:
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regVal = LPC_ADC->DR0;
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regVal = LPC_ADC->DR0;
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break;
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break;
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case 0x02:
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case 0x02:
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regVal = LPC_ADC->DR1;
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regVal = LPC_ADC->DR1;
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break;
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break;
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case 0x04:
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case 0x04:
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regVal = LPC_ADC->DR2;
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regVal = LPC_ADC->DR2;
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break;
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break;
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case 0x08:
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case 0x08:
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regVal = LPC_ADC->DR3;
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regVal = LPC_ADC->DR3;
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break;
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break;
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case 0x10:
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case 0x10:
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regVal = LPC_ADC->DR4;
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regVal = LPC_ADC->DR4;
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break;
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break;
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case 0x20:
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case 0x20:
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regVal = LPC_ADC->DR5;
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regVal = LPC_ADC->DR5;
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break;
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break;
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case 0x40:
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case 0x40:
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regVal = LPC_ADC->DR6;
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regVal = LPC_ADC->DR6;
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break;
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break;
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case 0x80:
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case 0x80:
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regVal = LPC_ADC->DR7;
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regVal = LPC_ADC->DR7;
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break;
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break;
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default:
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default:
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break;
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break;
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}
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}
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LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
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LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
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ADCIntDone = 1;
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ADCIntDone = 1;
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return;
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return;
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}
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}
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if ( regVal & ADC_ADINT )
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if ( regVal & ADC_ADINT )
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{
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{
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switch ( regVal & 0xFF ) /* check DONE bit */
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switch ( regVal & 0xFF ) /* check DONE bit */
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{
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{
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case 0x01:
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case 0x01:
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ADCValue[0] = ( LPC_ADC->DR0 >> 6 ) & 0x3FF;
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ADCValue[0] = ( LPC_ADC->DR0 >> 6 ) & 0x3FF;
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break;
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break;
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case 0x02:
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case 0x02:
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ADCValue[1] = ( LPC_ADC->DR1 >> 6 ) & 0x3FF;
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ADCValue[1] = ( LPC_ADC->DR1 >> 6 ) & 0x3FF;
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break;
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break;
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case 0x04:
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case 0x04:
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ADCValue[2] = ( LPC_ADC->DR2 >> 6 ) & 0x3FF;
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ADCValue[2] = ( LPC_ADC->DR2 >> 6 ) & 0x3FF;
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break;
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break;
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case 0x08:
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case 0x08:
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ADCValue[3] = ( LPC_ADC->DR3 >> 6 ) & 0x3FF;
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ADCValue[3] = ( LPC_ADC->DR3 >> 6 ) & 0x3FF;
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break;
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break;
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case 0x10:
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case 0x10:
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ADCValue[4] = ( LPC_ADC->DR4 >> 6 ) & 0x3FF;
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ADCValue[4] = ( LPC_ADC->DR4 >> 6 ) & 0x3FF;
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break;
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break;
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case 0x20:
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case 0x20:
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ADCValue[5] = ( LPC_ADC->DR5 >> 6 ) & 0x3FF;
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ADCValue[5] = ( LPC_ADC->DR5 >> 6 ) & 0x3FF;
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break;
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break;
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case 0x40:
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case 0x40:
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ADCValue[6] = ( LPC_ADC->DR6 >> 6 ) & 0x3FF;
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ADCValue[6] = ( LPC_ADC->DR6 >> 6 ) & 0x3FF;
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break;
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break;
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case 0x80:
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case 0x80:
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ADCValue[7] = ( LPC_ADC->DR7 >> 6 ) & 0x3FF;
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ADCValue[7] = ( LPC_ADC->DR7 >> 6 ) & 0x3FF;
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break;
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break;
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default:
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default:
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break;
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break;
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}
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}
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#if BURST_MODE
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#if BURST_MODE
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channel_flag |= (regVal & 0xFF);
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channel_flag |= (regVal & 0xFF);
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if ( (channel_flag & 0xFF) == 0xFF )
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if ( (channel_flag & 0xFF) == 0xFF )
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{
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{
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/* All the bits in have been set, it indicates all the ADC
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/* All the bits in have been set, it indicates all the ADC
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channels have been converted. */
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channels have been converted. */
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LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
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LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
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ADCIntDone = 1;
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ADCIntDone = 1;
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}
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}
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#else
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#else
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LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
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LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
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ADCIntDone = 1;
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ADCIntDone = 1;
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#endif
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#endif
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}
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}
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return;
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return;
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}
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}
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#endif
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#endif
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/*****************************************************************************
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/*****************************************************************************
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** Function name: ADCInit
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** Function name: ADCInit
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**
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**
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** Descriptions: initialize ADC channel
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** Descriptions: initialize ADC channel
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**
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**
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** parameters: ADC clock rate
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** parameters: ADC clock rate
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** Returned value: None
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** Returned value: None
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**
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**
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*****************************************************************************/
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*****************************************************************************/
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void ADCInit( uint32_t ADC_Clk )
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void ADCInit( uint32_t ADC_Clk )
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{
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{
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uint32_t i;
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uint32_t i;
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/* Disable Power down bit to the ADC block. */
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/* Disable Power down bit to the ADC block. */
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LPC_SYSCON->PDRUNCFG &= ~(0x1<<4);
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LPC_SYSCON->PDRUNCFG &= ~(0x1<<4);
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/* Enable AHB clock to the ADC. */
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/* Enable AHB clock to the ADC. */
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LPC_SYSCON->SYSAHBCLKCTRL |= (1<<13);
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LPC_SYSCON->SYSAHBCLKCTRL |= (1<<13);
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for ( i = 0; i < ADC_NUM; i++ )
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for ( i = 0; i < ADC_NUM; i++ )
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{
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{
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ADCValue[i] = 0x0;
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ADCValue[i] = 0x0;
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}
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}
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/* Unlike some other pings, for ADC test, all the pins need
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/* Unlike some other pings, for ADC test, all the pins need
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to set to analog mode. Bit 7 needs to be cleared according
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to set to analog mode. Bit 7 needs to be cleared according
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to design team. */
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to design team. */
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LPC_IOCON->PIO0_11 &= ~0x8F; /* ADC I/O config */
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LPC_IOCON->PIO0_11 &= ~0x8F; /* ADC I/O config */
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LPC_IOCON->PIO0_11 |= 0x02; /* ADC IN0 */
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LPC_IOCON->PIO0_11 |= 0x02; /* ADC IN0 */
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#ifdef __JTAG_DISABLED
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#ifdef __JTAG_DISABLED
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LPC_IOCON->R_PIO1_0 &= ~0x8F;
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LPC_IOCON->R_PIO1_0 &= ~0x8F;
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LPC_IOCON->R_PIO1_0 |= 0x02; /* ADC IN1 */
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LPC_IOCON->R_PIO1_0 |= 0x02; /* ADC IN1 */
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LPC_IOCON->R_PIO1_1 &= ~0x8F;
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LPC_IOCON->R_PIO1_1 &= ~0x8F;
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LPC_IOCON->R_PIO1_1 |= 0x02; /* ADC IN2 */
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LPC_IOCON->R_PIO1_1 |= 0x02; /* ADC IN2 */
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LPC_IOCON->R_PIO1_2 &= ~0x8F;
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LPC_IOCON->R_PIO1_2 &= ~0x8F;
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LPC_IOCON->R_PIO1_2 |= 0x02; /* ADC IN3 */
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LPC_IOCON->R_PIO1_2 |= 0x02; /* ADC IN3 */
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#ifdef __SWD_DISABLED
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#ifdef __SWD_DISABLED
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LPC_IOCON->SWDIO_PIO1_3 &= ~0x8F;
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LPC_IOCON->SWDIO_PIO1_3 &= ~0x8F;
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LPC_IOCON->SWDIO_PIO1_3 |= 0x02; /* ADC IN4 */
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LPC_IOCON->SWDIO_PIO1_3 |= 0x02; /* ADC IN4 */
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#endif
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#endif
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#endif
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#endif
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LPC_IOCON->PIO1_4 &= ~0x8F; /* Clear bit7, change to analog mode. */
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LPC_IOCON->PIO1_4 &= ~0x8F; /* Clear bit7, change to analog mode. */
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LPC_IOCON->PIO1_4 |= 0x01; /* ADC IN5 */
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LPC_IOCON->PIO1_4 |= 0x01; /* ADC IN5 */
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LPC_IOCON->PIO1_10 &= ~0x8F; /* Clear bit7, change to analog mode. */
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LPC_IOCON->PIO1_10 &= ~0x8F; /* Clear bit7, change to analog mode. */
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LPC_IOCON->PIO1_10 |= 0x01; /* ADC IN6 */
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LPC_IOCON->PIO1_10 |= 0x01; /* ADC IN6 */
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LPC_IOCON->PIO1_11 &= ~0x8F; /* Clear bit7, change to analog mode. */
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LPC_IOCON->PIO1_11 &= ~0x8F; /* Clear bit7, change to analog mode. */
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LPC_IOCON->PIO1_11 |= 0x01; /* ADC IN7 */
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LPC_IOCON->PIO1_11 |= 0x01; /* ADC IN7 */
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|
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LPC_ADC->CR = ( 0x01 << 0 ) | /* SEL=1,select channel 0~7 on ADC0 */
|
LPC_ADC->CR = ( 0x01 << 0 ) | /* SEL=1,select channel 0~7 on ADC0 */
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(((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/ADC_Clk-1)<<8) | /* CLKDIV = Fpclk / 1000000 - 1 */
|
(((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/ADC_Clk-1)<<8) | /* CLKDIV = Fpclk / 1000000 - 1 */
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( 0 << 16 ) | /* BURST = 0, no BURST, software controlled */
|
( 0 << 16 ) | /* BURST = 0, no BURST, software controlled */
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( 3 << 17 ) | /* CLKS = 0, 11 clocks/10 bits */
|
( 3 << 17 ) | /* CLKS = 0, 11 clocks/10 bits */
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( 0 << 24 ) | /* START = 0 A/D conversion stops */
|
( 0 << 24 ) | /* START = 0 A/D conversion stops */
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( 0 << 27 ); /* EDGE = 0 (CAP/MAT singal falling,trigger A/D conversion) */
|
( 0 << 27 ); /* EDGE = 0 (CAP/MAT singal falling,trigger A/D conversion) */
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|
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/* If POLLING, no need to do the following */
|
/* If POLLING, no need to do the following */
|
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#if ADC_INTERRUPT_FLAG
|
#if ADC_INTERRUPT_FLAG
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NVIC_EnableIRQ(ADC_IRQn);
|
NVIC_EnableIRQ(ADC_IRQn);
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LPC_ADC->INTEN = 0x1FF; /* Enable all interrupts */
|
LPC_ADC->INTEN = 0x1FF; /* Enable all interrupts */
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#endif
|
#endif
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return;
|
return;
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}
|
}
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|
|
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/*****************************************************************************
|
/*****************************************************************************
|
||||||
** Function name: ADCRead
|
** Function name: ADCRead
|
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**
|
**
|
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** Descriptions: Read ADC channel
|
** Descriptions: Read ADC channel
|
||||||
**
|
**
|
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** parameters: Channel number
|
** parameters: Channel number
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** Returned value: Value read, if interrupt driven, return channel #
|
** Returned value: Value read, if interrupt driven, return channel #
|
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**
|
**
|
||||||
*****************************************************************************/
|
*****************************************************************************/
|
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uint32_t ADCRead( uint8_t channelNum )
|
uint32_t ADCRead( uint8_t channelNum )
|
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{
|
{
|
||||||
#if !ADC_INTERRUPT_FLAG
|
#if !ADC_INTERRUPT_FLAG
|
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uint32_t regVal, ADC_Data;
|
uint32_t regVal, ADC_Data;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* channel number is 0 through 7 */
|
/* channel number is 0 through 7 */
|
||||||
if ( channelNum >= ADC_NUM )
|
if ( channelNum >= ADC_NUM )
|
||||||
{
|
{
|
||||||
channelNum = 0; /* reset channel number to 0 */
|
channelNum = 0; /* reset channel number to 0 */
|
||||||
}
|
}
|
||||||
LPC_ADC->CR &= 0xFFFFFF00;
|
LPC_ADC->CR &= 0xFFFFFF00;
|
||||||
LPC_ADC->CR |= (1 << 24) | (1 << channelNum);
|
LPC_ADC->CR |= (1 << 24) | (1 << channelNum);
|
||||||
/* switch channel,start A/D convert */
|
/* switch channel,start A/D convert */
|
||||||
#if !ADC_INTERRUPT_FLAG
|
#if !ADC_INTERRUPT_FLAG
|
||||||
while ( 1 ) /* wait until end of A/D convert */
|
while ( 1 ) /* wait until end of A/D convert */
|
||||||
{
|
{
|
||||||
regVal = *(volatile unsigned long *)(LPC_ADC_BASE
|
regVal = *(volatile unsigned long *)(LPC_ADC_BASE
|
||||||
+ ADC_OFFSET + ADC_INDEX * channelNum);
|
+ ADC_OFFSET + ADC_INDEX * channelNum);
|
||||||
/* read result of A/D conversion */
|
/* read result of A/D conversion */
|
||||||
if ( regVal & ADC_DONE )
|
if ( regVal & ADC_DONE )
|
||||||
{
|
{
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
|
LPC_ADC->CR &= 0xF8FFFFFF; /* stop ADC now */
|
||||||
if ( regVal & ADC_OVERRUN ) /* save data when it's not overrun, otherwise, return zero */
|
if ( regVal & ADC_OVERRUN ) /* save data when it's not overrun, otherwise, return zero */
|
||||||
{
|
{
|
||||||
return ( 0 );
|
return ( 0 );
|
||||||
}
|
}
|
||||||
ADC_Data = ( regVal >> 6 ) & 0x3FF;
|
ADC_Data = ( regVal >> 6 ) & 0x3FF;
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||||||
return ( ADC_Data ); /* return A/D conversion value */
|
return ( ADC_Data ); /* return A/D conversion value */
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#else
|
#else
|
||||||
return ( channelNum ); /* if it's interrupt driven, the ADC reading is
|
return ( channelNum ); /* if it's interrupt driven, the ADC reading is
|
||||||
done inside the handler. so, return channel number */
|
done inside the handler. so, return channel number */
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
** Function name: ADC0BurstRead
|
** Function name: ADC0BurstRead
|
||||||
**
|
**
|
||||||
** Descriptions: Use burst mode to convert multiple channels once.
|
** Descriptions: Use burst mode to convert multiple channels once.
|
||||||
**
|
**
|
||||||
** parameters: None
|
** parameters: None
|
||||||
** Returned value: None
|
** Returned value: None
|
||||||
**
|
**
|
||||||
*****************************************************************************/
|
*****************************************************************************/
|
||||||
void ADCBurstRead( void )
|
void ADCBurstRead( void )
|
||||||
{
|
{
|
||||||
if ( LPC_ADC->CR & (0x7<<24) )
|
if ( LPC_ADC->CR & (0x7<<24) )
|
||||||
{
|
{
|
||||||
LPC_ADC->CR &= ~(0x7<<24);
|
LPC_ADC->CR &= ~(0x7<<24);
|
||||||
}
|
}
|
||||||
/* Test channel 5,6,7 using burst mode because they are not shared
|
/* Test channel 5,6,7 using burst mode because they are not shared
|
||||||
with the JTAG pins. */
|
with the JTAG pins. */
|
||||||
LPC_ADC->CR &= ~0xFF;
|
LPC_ADC->CR &= ~0xFF;
|
||||||
/* Read all channels, 0 through 7. */
|
/* Read all channels, 0 through 7. */
|
||||||
LPC_ADC->CR |= (0xFF);
|
LPC_ADC->CR |= (0xFF);
|
||||||
LPC_ADC->CR |= (0x1<<16); /* Set burst mode and start A/D convert */
|
LPC_ADC->CR |= (0x1<<16); /* Set burst mode and start A/D convert */
|
||||||
return; /* the ADC reading is done inside the
|
return; /* the ADC reading is done inside the
|
||||||
handler, return 0. */
|
handler, return 0. */
|
||||||
}
|
}
|
||||||
|
|
||||||
/*********************************************************************************
|
/*********************************************************************************
|
||||||
** End Of File
|
** End Of File
|
||||||
*********************************************************************************/
|
*********************************************************************************/
|
||||||
|
|
|
||||||
|
|
@ -1,44 +1,44 @@
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* $Id:: adc.h 3633 2010-06-01 23:03:16Z usb00423 $
|
* $Id:: adc.h 3633 2010-06-01 23:03:16Z usb00423 $
|
||||||
* Project: NXP LPC13xx ADC example
|
* Project: NXP LPC13xx ADC example
|
||||||
*
|
*
|
||||||
* Description:
|
* Description:
|
||||||
* This file contains ADC code header definition.
|
* This file contains ADC code header definition.
|
||||||
*
|
*
|
||||||
****************************************************************************
|
****************************************************************************
|
||||||
* Software that is described herein is for illustrative purposes only
|
* Software that is described herein is for illustrative purposes only
|
||||||
* which provides customers with programming information regarding the
|
* which provides customers with programming information regarding the
|
||||||
* products. This software is supplied "AS IS" without any warranties.
|
* products. This software is supplied "AS IS" without any warranties.
|
||||||
* NXP Semiconductors assumes no responsibility or liability for the
|
* NXP Semiconductors assumes no responsibility or liability for the
|
||||||
* use of the software, conveys no license or title under any patent,
|
* use of the software, conveys no license or title under any patent,
|
||||||
* copyright, or mask work right to the product. NXP Semiconductors
|
* copyright, or mask work right to the product. NXP Semiconductors
|
||||||
* reserves the right to make changes in the software without
|
* reserves the right to make changes in the software without
|
||||||
* notification. NXP Semiconductors also make no representation or
|
* notification. NXP Semiconductors also make no representation or
|
||||||
* warranty that such application will be suitable for the specified
|
* warranty that such application will be suitable for the specified
|
||||||
* use without further testing or modification.
|
* use without further testing or modification.
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
#ifndef __ADC_H
|
#ifndef __ADC_H
|
||||||
#define __ADC_H
|
#define __ADC_H
|
||||||
|
|
||||||
#define ADC_INTERRUPT_FLAG 0 /* 1 is interrupt driven, 0 is polling */
|
#define ADC_INTERRUPT_FLAG 0 /* 1 is interrupt driven, 0 is polling */
|
||||||
#define BURST_MODE 0 /* Burst mode works in interrupt driven mode only. */
|
#define BURST_MODE 0 /* Burst mode works in interrupt driven mode only. */
|
||||||
#define ADC_DEBUG 0
|
#define ADC_DEBUG 0
|
||||||
|
|
||||||
#define ADC_OFFSET 0x10
|
#define ADC_OFFSET 0x10
|
||||||
#define ADC_INDEX 4
|
#define ADC_INDEX 4
|
||||||
|
|
||||||
#define ADC_DONE 0x80000000
|
#define ADC_DONE 0x80000000
|
||||||
#define ADC_OVERRUN 0x40000000
|
#define ADC_OVERRUN 0x40000000
|
||||||
#define ADC_ADINT 0x00010000
|
#define ADC_ADINT 0x00010000
|
||||||
|
|
||||||
#define ADC_NUM 8 /* for LPC13xx */
|
#define ADC_NUM 8 /* for LPC13xx */
|
||||||
#define ADC_CLK 1000000 /* set to 1Mhz */
|
#define ADC_CLK 1000000 /* set to 1Mhz */
|
||||||
|
|
||||||
extern void ADC_IRQHandler( void );
|
extern void ADC_IRQHandler( void );
|
||||||
extern void ADCInit( uint32_t ADC_Clk );
|
extern void ADCInit( uint32_t ADC_Clk );
|
||||||
extern uint32_t ADCRead( uint8_t channelNum );
|
extern uint32_t ADCRead( uint8_t channelNum );
|
||||||
extern void ADCBurstRead( void );
|
extern void ADCBurstRead( void );
|
||||||
#endif /* end __ADC_H */
|
#endif /* end __ADC_H */
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
** End Of File
|
** End Of File
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue