Fixup for compiling new table module.

This commit is contained in:
Dominik Pantůček 2023-06-15 14:35:11 +02:00
parent 3f7f1356a4
commit 3e4e8c4672
4 changed files with 7 additions and 4 deletions

View file

@ -400,7 +400,7 @@ TABLE-SOURCES=table.scm sgr-list.import.scm sgr-block.import.scm \
table.o: table.import.scm
table.import.scm: $(TABLE-SOURCES)
SGR-LIST-SOURCES=sgr-list.scm raket-kwargs.import.scm \
SGR-LIST-SOURCES=sgr-list.scm racket-kwargs.import.scm \
sgr-state.import.scm testing.import.scm util-utf8.import.scm
sgr-list.o: sgr-list.import.scm

View file

@ -117,7 +117,7 @@
(= (bitwise-and v (bitwise-not sgr-state-bit-mask)) 0))
(and (pair? v)
(fixnum? (car v))
(= (bitwise-and v (bitwise-not sgr-state-bit-mask)) 0)
(= (bitwise-and (car v) (bitwise-not sgr-state-bit-mask)) 0)
(pair? (cdr v))
(or (not (cadr v))
(and (fixnum? (cadr v))

View file

@ -173,7 +173,7 @@
(define (table-prepare tbl width-arg widths-spec)
(if (or (null? tbl)
(null? (car tbl)))
'()
(values '() '())
(let* ((ptbl (table-prepare-cells tbl))
;;(_ (print ptbl))
(num-columns (length (car ptbl)))

View file

@ -163,7 +163,10 @@
3))
((= (bitwise-and byte #b11110000) #b11110000)
(values (bitwise-and byte #b111)
4)))))
4))
(else
;; Should not happen
(values 0 0)))))
(loop (cdr bytes)
(list byte)
(arithmetic-shift first-byte 6)