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https://github.com/brmlab/edubrm.git
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48c2cc1630
commit
1271571cb0
3 changed files with 56 additions and 13 deletions
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@ -160,7 +160,7 @@ void ADCInit( uint32_t ADC_Clk )
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to design team. */
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LPC_IOCON->PIO0_11 &= ~0x8F; /* ADC I/O config */
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LPC_IOCON->PIO0_11 |= 0x02; /* ADC IN0 */
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#if 0
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#if 1
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LPC_IOCON->PIO1_0 &= ~0x8F;
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LPC_IOCON->PIO1_0 |= 0x02; /* ADC IN1 */
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LPC_IOCON->PIO1_1 &= ~0x8F;
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@ -39,29 +39,35 @@ void SetOutReport (uint8_t dst[], uint32_t length)
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break;
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case 'd':
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wavetype = dst[1];
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// TODO: set DDS to (wavetype) using SPI (set PIN_10 to 0, send SPI commands, set PIN_10 to 1)
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LPC_GPIO0->MASKED_ACCESS[1<<2] &= ((0<<2) | ~(1<<2)); // set chipselect to 0
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// TODO: set SPI commands
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LPC_GPIO0->MASKED_ACCESS[1<<2] |= (0<<2); // set chipselect to 1
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break;
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case 'D':
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freq = dst[1] + (dst[2]<<8) + (dst[3]<<16) + (dst[4]<<24);
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// TODO: set DDS to (freq) Hz using SPI (set PIN_10 to 0, send SPI commands, set PIN_10 to 1)
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LPC_GPIO0->MASKED_ACCESS[1<<2] &= ((0<<2) | ~(1<<2)); // set chipselect to 0
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// TODO: set SPI commands
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LPC_GPIO0->MASKED_ACCESS[1<<2] |= (0<<2); // set chipselect to 1
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break;
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case 'm':
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which = dst[1];
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chan = dst[2];
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gain = dst[3];
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// TODO: set opamp (which) on channel (chan) with gain (gain)
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// for opamp1: set PIN_48 to 0, send SPI commands, set PIN_48 to 1
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// for opamp2: set PIN_43 to 0, send SPI commands, set PIN_43 to 1
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if (which == 1) {
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LPC_GPIO3->MASKED_ACCESS[1<<3] &= ((0<<3) | ~(1<<3)); // set chipselect to 0
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} else {
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LPC_GPIO3->MASKED_ACCESS[1<<2] &= ((0<<2) | ~(1<<2)); // set chipselect to 0
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}
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// TODO: set opamp (which) on channel (chan) with gain (gain) via SPI
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if (which == 1) {
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LPC_GPIO3->MASKED_ACCESS[1<<3] |= (0<<3); // set chipselect to 1
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} else {
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LPC_GPIO3->MASKED_ACCESS[1<<2] |= (0<<2); // set chipselect to 1
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}
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break;
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case 's':
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states = dst[1];
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// TODO: set switches to states
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// switch1: PIN_12
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// switch2: PIN_24
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// switch3: PIN_25
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// switch4: PIN_31
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// switch5: PIN_36
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// switch6: PIN_37
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SwitchesSetup(states);
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break;
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case 'P':
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states = dst[1];
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@ -75,6 +81,21 @@ void SetOutReport (uint8_t dst[], uint32_t length)
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}
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}
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void SwitchesSetup(uint8_t states) {
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LPC_GPIO2->MASKED_ACCESS[1<<8] |= ((( states && 0x01) >> 0)<<8);
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LPC_GPIO2->MASKED_ACCESS[1<<8] &= ((((states && 0x01) >> 0)<<8) | ~(1<<8));
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LPC_GPIO2->MASKED_ACCESS[1<<9] |= ((( states && 0x02) >> 1)<<9);
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LPC_GPIO2->MASKED_ACCESS[1<<9] &= ((((states && 0x02) >> 1)<<9) | ~(1<<9));
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LPC_GPIO2->MASKED_ACCESS[1<<10] |= ((( states && 0x04) >> 2)<<10);
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LPC_GPIO2->MASKED_ACCESS[1<<10] &= ((((states && 0x04) >> 2)<<10) | ~(1<<10));
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LPC_GPIO2->MASKED_ACCESS[1<<11] |= ((( states && 0x08) >> 3)<<11);
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LPC_GPIO2->MASKED_ACCESS[1<<11] &= ((((states && 0x08) >> 3)<<11) | ~(1<<11));
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LPC_GPIO3->MASKED_ACCESS[1<<0] |= ((( states && 0x10) >> 4)<<0);
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LPC_GPIO3->MASKED_ACCESS[1<<0] &= ((((states && 0x10) >> 4)<<0) | ~(1<<0));
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LPC_GPIO3->MASKED_ACCESS[1<<1] |= ((( states && 0x20) >> 5)<<1);
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LPC_GPIO3->MASKED_ACCESS[1<<1] &= ((((states && 0x20) >> 5)<<1) | ~(1<<1));
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}
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void PinInit() {
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// set pins function
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LPC_IOCON->PIO2_0 &= ~0x07;
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@ -83,6 +104,27 @@ void PinInit() {
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LPC_IOCON->PIO2_6 |= 0x00;
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LPC_IOCON->PIO2_7 &= ~0x07;
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LPC_IOCON->PIO2_7 |= 0x00;
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// set switches function
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LPC_IOCON->PIO2_8 &= ~0x07;
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LPC_IOCON->PIO2_8 |= 0x00;
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LPC_IOCON->PIO2_9 &= ~0x07;
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LPC_IOCON->PIO2_9 |= 0x00;
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LPC_IOCON->PIO2_10 &= ~0x07;
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LPC_IOCON->PIO2_10 |= 0x00;
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LPC_IOCON->PIO2_11 &= ~0x07;
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LPC_IOCON->PIO2_11 |= 0x00;
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LPC_IOCON->PIO3_0 &= ~0x07;
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LPC_IOCON->PIO3_0 |= 0x00;
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LPC_IOCON->PIO3_1 &= ~0x07;
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LPC_IOCON->PIO3_1 |= 0x00;
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//set chip select pins function
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LPC_IOCON->PIO0_2 &= ~0x07; // DDS
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LPC_IOCON->PIO0_2 |= 0x00;
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LPC_IOCON->PIO3_3 &= ~0x07; // OPAMP1
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LPC_IOCON->PIO3_3 |= 0x00;
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LPC_IOCON->PIO3_2 &= ~0x07; // OPAMP2
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LPC_IOCON->PIO3_2 |= 0x00;
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PinDir(0); // all 3 pins are output 0
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PinState(1, 0);
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PinState(2, 0);
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@ -5,3 +5,4 @@ void EnablePWM2(uint16_t period, uint16_t duty);
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void PinDir(uint16_t mask);
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void PinState(uint8_t which, uint8_t state);
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void EduInit();
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void SwitchesSetup(uint8_t states);
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