mirror of
https://github.com/brmlab/edubrm.git
synced 2025-06-08 12:53:59 +02:00
256 lines
6.4 KiB
C
256 lines
6.4 KiB
C
#include "config.h"
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#include "LPC13xx.h"
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#include "ssp.h"
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#include "adc.h"
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#include "edubrm.h"
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void GetInReport (uint8_t src[], uint32_t length)
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{
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uint8_t i;
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uint32_t volatile reg = LPC_USB->CmdCode;
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if (reg & (5<<8)) return;
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for (i=0; i<7; ++i) {
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uint32_t v = ADCRead(i);
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src[i*2 ] = v & 0xff;
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src[i*2+1] = (v>>8) & 0xff;
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}
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src[14] = 0;
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src[14] |= (LPC_GPIO2->MASKED_ACCESS[1<<6] & (1<<6)) >> 6;
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src[14] |= (LPC_GPIO2->MASKED_ACCESS[1<<0] & (1<<0)) << 1;
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src[14] |= (LPC_GPIO2->MASKED_ACCESS[1<<7] & (1<<7)) >> 5;
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}
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void SetOutReport (uint8_t dst[], uint32_t length)
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{
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uint8_t which, wavetype, chan, states, gain, state;
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uint16_t duty;
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uint32_t freq;
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switch (dst[0]) {
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case 'p':
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which = dst[1];
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duty = dst[2] + (dst[3]<<8);
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if (which == 1) {
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EnablePWM1(65535, duty);
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} else {
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EnablePWM2(65535, duty);
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}
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break;
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case 'd':
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wavetype = dst[1];
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LPC_GPIO0->MASKED_ACCESS[1<<2] &= ((0<<2) | ~(1<<2)); // set chipselect to 0
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// TODO: set SPI commands
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LPC_GPIO0->MASKED_ACCESS[1<<2] |= (0<<2); // set chipselect to 1
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break;
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case 'D':
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freq = dst[1] + (dst[2]<<8) + (dst[3]<<16) + (dst[4]<<24);
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LPC_GPIO0->MASKED_ACCESS[1<<2] &= ((0<<2) | ~(1<<2)); // set chipselect to 0
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// TODO: set SPI commands
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LPC_GPIO0->MASKED_ACCESS[1<<2] |= (0<<2); // set chipselect to 1
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break;
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case 'm':
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which = dst[1];
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chan = dst[2];
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gain = dst[3];
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if (which == 1) {
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LPC_GPIO3->MASKED_ACCESS[1<<3] &= ((0<<3) | ~(1<<3)); // set chipselect to 0
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} else {
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LPC_GPIO3->MASKED_ACCESS[1<<2] &= ((0<<2) | ~(1<<2)); // set chipselect to 0
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}
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// TODO: set opamp (which) on channel (chan) with gain (gain) via SPI
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if (which == 1) {
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LPC_GPIO3->MASKED_ACCESS[1<<3] |= (0<<3); // set chipselect to 1
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} else {
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LPC_GPIO3->MASKED_ACCESS[1<<2] |= (0<<2); // set chipselect to 1
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}
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break;
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case 's':
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states = dst[1];
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SwitchesSetup(states);
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break;
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case 'P':
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states = dst[1];
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PinDir(states);
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break;
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case 'o':
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which = dst[1] >> 1;
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state = dst[1] & 0x01;
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PinState(which, state);
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break;
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}
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}
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void SwitchesSetup(uint8_t states) {
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LPC_GPIO2->MASKED_ACCESS[1<<8] |= ((( states && 0x01) >> 0)<<8);
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LPC_GPIO2->MASKED_ACCESS[1<<8] &= ((((states && 0x01) >> 0)<<8) | ~(1<<8));
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LPC_GPIO2->MASKED_ACCESS[1<<9] |= ((( states && 0x02) >> 1)<<9);
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LPC_GPIO2->MASKED_ACCESS[1<<9] &= ((((states && 0x02) >> 1)<<9) | ~(1<<9));
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LPC_GPIO2->MASKED_ACCESS[1<<10] |= ((( states && 0x04) >> 2)<<10);
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LPC_GPIO2->MASKED_ACCESS[1<<10] &= ((((states && 0x04) >> 2)<<10) | ~(1<<10));
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LPC_GPIO2->MASKED_ACCESS[1<<11] |= ((( states && 0x08) >> 3)<<11);
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LPC_GPIO2->MASKED_ACCESS[1<<11] &= ((((states && 0x08) >> 3)<<11) | ~(1<<11));
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LPC_GPIO3->MASKED_ACCESS[1<<0] |= ((( states && 0x10) >> 4)<<0);
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LPC_GPIO3->MASKED_ACCESS[1<<0] &= ((((states && 0x10) >> 4)<<0) | ~(1<<0));
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LPC_GPIO3->MASKED_ACCESS[1<<1] |= ((( states && 0x20) >> 5)<<1);
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LPC_GPIO3->MASKED_ACCESS[1<<1] &= ((((states && 0x20) >> 5)<<1) | ~(1<<1));
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}
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void PinInit() {
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// set pins function
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LPC_IOCON->PIO2_0 &= ~0x07;
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LPC_IOCON->PIO2_0 |= 0x00;
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LPC_IOCON->PIO2_6 &= ~0x07;
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LPC_IOCON->PIO2_6 |= 0x00;
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LPC_IOCON->PIO2_7 &= ~0x07;
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LPC_IOCON->PIO2_7 |= 0x00;
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// set switches function
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LPC_IOCON->PIO2_8 &= ~0x07;
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LPC_IOCON->PIO2_8 |= 0x00;
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LPC_IOCON->PIO2_9 &= ~0x07;
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LPC_IOCON->PIO2_9 |= 0x00;
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LPC_IOCON->PIO2_10 &= ~0x07;
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LPC_IOCON->PIO2_10 |= 0x00;
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LPC_IOCON->PIO2_11 &= ~0x07;
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LPC_IOCON->PIO2_11 |= 0x00;
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LPC_IOCON->PIO3_0 &= ~0x07;
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LPC_IOCON->PIO3_0 |= 0x00;
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LPC_IOCON->PIO3_1 &= ~0x07;
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LPC_IOCON->PIO3_1 |= 0x00;
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//set chip select pins function
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LPC_IOCON->PIO0_2 &= ~0x07; // DDS
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LPC_IOCON->PIO0_2 |= 0x00;
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LPC_IOCON->PIO3_3 &= ~0x07; // OPAMP1
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LPC_IOCON->PIO3_3 |= 0x00;
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LPC_IOCON->PIO3_2 &= ~0x07; // OPAMP2
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LPC_IOCON->PIO3_2 |= 0x00;
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PinDir(0); // all 3 pins are output 0
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PinState(1, 0);
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PinState(2, 0);
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PinState(3, 0);
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}
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void EduInit() {
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SSPInit();
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ADCInit(ADC_CLK);
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PinInit();
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}
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void PinDir(uint16_t mask) {
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mask &= 7;
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mask ^= 7;
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mask = ((mask & 4) << 5) | ((mask & 2) >> 1) | ((mask & 1)<<6);
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LPC_GPIO2->DIR |= mask;
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mask |= ~(1<<0 | 1<<6 | 1<<7);
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LPC_GPIO2->DIR &= mask;
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if (!(mask & (1<<6)))
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PinState(1, 0);
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if (!(mask & (1<<0)))
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PinState(2, 0);
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if (!(mask & (1<<7)))
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PinState(3, 0);
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}
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void PinState(uint8_t which, uint8_t state) {
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state &= 1;
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which -= 1;
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switch (which) {
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case 0: which = 6; break;
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case 1: which = 0; break;
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case 2: which = 7; break;
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}
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if (which < 0) return;
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LPC_GPIO2->MASKED_ACCESS[1<<which] |= (state<<which);
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LPC_GPIO2->MASKED_ACCESS[1<<which] &= ((state<<which) | ~(1<<which));
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}
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void TIMER16_1_IRQHandler(void) {
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LPC_TMR16B1->IR = 0xff;
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LPC_GPIO1->DIR ^= 1<<6;
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LPC_TMR16B1->MR0 -= 100;
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}
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//static uint8_t x = 0;
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void TIMER32_0_IRQHandler(void) {
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LPC_TMR32B0->IR = 0xff; // clear interrupt
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/*
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uint32_t x = LPC_TMR32B0->EMR & 1 ? 0xff : 0;
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SSPSend((uint8_t*)&x, 1);
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*/
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/*
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uint32_t x = ADCRead(0);
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uint8_t z = 0;
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if (x >= 0) z = 0x01;
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if (x >= 32) z = 0x02;
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if (x >= 64) z = 0x04;
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if (x >= 96) z = 0x08;
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if (x >= 128) z = 0x10;
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if (x >= 160) z = 0x20;
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if (x >= 192) z = 0x40;
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if (x >= 256) z = 0x80;
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z |= 0x80;
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SSPSend(&z, 1);
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*/
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// read PIO3_3
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uint8_t x = LPC_GPIO3->MASKED_ACCESS[1<<3];
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x = (x&(1<<3)) ? 0xff : 0;
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SSPSend(&x, 1);
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}
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void EnablePWM1(uint32_t period, uint32_t duty) {
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if (!duty) {
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1<<9); // disable
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return;
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}
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LPC_SYSCON->SYSAHBCLKCTRL |= 1<<9; // Enables clock for 32-bit counter/timer 0.
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LPC_IOCON->PIO1_6 &= ~0x07;
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LPC_IOCON->PIO1_6 |= 0x02; // Selects function CT32B0_MAT0
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LPC_TMR32B0->MR3 = period;
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LPC_TMR32B0->MR0 = duty;
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LPC_TMR32B0->MCR = 1<<10; // Reset on MR3: the TC will be reset if MR3 matches it.
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LPC_TMR32B0->EMR = 3<<4; // Toggle the corresponding External Match bit/output.
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LPC_TMR32B0->PWMC = 1<<0 | 1<<3; // enable PWM
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LPC_TMR32B0->TCR = 1;
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}
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void EnablePWM2(uint16_t period, uint16_t duty) {
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if (!duty) {
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1<<8); // disable
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return;
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}
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LPC_SYSCON->SYSAHBCLKCTRL |= 1<<8; // Enables clock for 16-bit counter/timer 1.
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LPC_IOCON->PIO1_9 &= ~0x07;
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LPC_IOCON->PIO1_9 |= 0x01; // Selects function CT16B1_MAT0
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LPC_TMR16B1->MR3 = period;
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LPC_TMR16B1->MR0 = duty;
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LPC_TMR16B1->MCR = 1<<10; // Reset on MR3: the TC will be reset if MR3 matches it.
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LPC_TMR16B1->EMR = 3<<4; // Toggle the corresponding External Match bit/output.
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LPC_TMR16B1->PWMC = 1<<0 | 1<<3; // enable PWM
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LPC_TMR16B1->TCR = 1;
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}
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